[llvm] [SCEV] Use AddRec monotonicity in isKnownViaNonRecursiveReasoning. (PR #218280)

[Nikita Popov via llvm-commits]

================
@@ -0,0 +1,151 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
+; RUN: opt -p indvars -S %s | FileCheck %s
+
+define void @nuw_strict_vs_nonstrict(i64 %start, i64 %n, ptr %out) {
+; CHECK-LABEL: define void @nuw_strict_vs_nonstrict(
+; CHECK-SAME: i64 [[START:%.*]], i64 [[N:%.*]], ptr [[OUT:%.*]]) {
+; CHECK-NEXT:  [[ENTRY:.*]]:
+; CHECK-NEXT:    br label %[[LOOP:.*]]
+; CHECK:       [[LOOP]]:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[START]], %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT:    [[GT:%.*]] = icmp ugt i64 [[IV]], [[START]]
+; CHECK-NEXT:    [[LE:%.*]] = icmp ule i64 [[IV]], [[START]]
+; CHECK-NEXT:    store volatile i1 false, ptr [[OUT]], align 1
+; CHECK-NEXT:    store volatile i1 true, ptr [[OUT]], align 1
+; CHECK-NEXT:    store volatile i1 [[GT]], ptr [[OUT]], align 1
+; CHECK-NEXT:    store volatile i1 [[LE]], ptr [[OUT]], align 1
+; CHECK-NEXT:    [[IV_NEXT]] = add nuw i64 [[IV]], 1
+; CHECK-NEXT:    [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
+; CHECK-NEXT:    br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK:       [[EXIT]]:
+; CHECK-NEXT:    ret void
+;
+entry:
+  br label %loop
+
+loop:
+  %iv = phi i64 [ %start, %entry ], [ %iv.next, %loop ]
+  %lt = icmp ult i64 %iv, %start
+  %ge = icmp uge i64 %iv, %start
+  %gt = icmp ugt i64 %iv, %start
+  %le = icmp ule i64 %iv, %start
+  store volatile i1 %lt, ptr %out
+  store volatile i1 %ge, ptr %out
+  store volatile i1 %gt, ptr %out
+  store volatile i1 %le, ptr %out
+  %iv.next = add nuw i64 %iv, 1
+  %ec = icmp eq i64 %iv.next, %n
+  br i1 %ec, label %exit, label %loop
+
+exit:
+  ret void
+}
+
+define void @nuw_addrec_on_rhs(i64 %start, i64 %n, ptr %out) {
+; CHECK-LABEL: define void @nuw_addrec_on_rhs(
+; CHECK-SAME: i64 [[START:%.*]], i64 [[N:%.*]], ptr [[OUT:%.*]]) {
+; CHECK-NEXT:  [[ENTRY:.*]]:
+; CHECK-NEXT:    br label %[[LOOP:.*]]
+; CHECK:       [[LOOP]]:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ [[START]], %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT:    [[LT:%.*]] = icmp ult i64 [[START]], [[IV]]
+; CHECK-NEXT:    store volatile i1 false, ptr [[OUT]], align 1
+; CHECK-NEXT:    store volatile i1 true, ptr [[OUT]], align 1
+; CHECK-NEXT:    store volatile i1 [[LT]], ptr [[OUT]], align 1
+; CHECK-NEXT:    [[IV_NEXT]] = add nuw i64 [[IV]], 1
+; CHECK-NEXT:    [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
+; CHECK-NEXT:    br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]]
+; CHECK:       [[EXIT]]:
+; CHECK-NEXT:    ret void
+;
+entry:
+  br label %loop
+
+loop:
+  %iv = phi i64 [ %start, %entry ], [ %iv.next, %loop ]
+  %gt = icmp ugt i64 %start, %iv
+  %le = icmp ule i64 %start, %iv
+  %lt = icmp ult i64 %start, %iv
----------------
nikic wrote:

Is it intentional that this does not test the ge case, unlike the previous one?

https://github.com/llvm/llvm-project/pull/218280