[llvm] [M68k] Implement `CLR` instruction encoding and logic (PR #216636)

via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 23 09:27:10 PDT 2026


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@@ -609,6 +637,29 @@ bool M68kInstrInfo::ExpandMOVEM(MachineInstrBuilder &MIB,
   return true;
 }
 
+void M68kInstrInfo::buildClearRegister(Register Reg, MachineBasicBlock &MBB,
+                                       MachineBasicBlock::iterator Iter,
+                                       DebugLoc &DL,
+                                       bool AllowSideEffects) const {
+  // Clear an address register by subtracting it from itself.
+  if (M68k::AR32RegClass.contains(Reg)) {
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knickish wrote:

no `AR16RegClass`?

https://github.com/llvm/llvm-project/pull/216636


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