[llvm] [RISCV] Port ExpandAtomicPseudo to NewPM (PR #218161)
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Sat Aug 22 13:29:57 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Sam Elliott (lenary)
<details>
<summary>Changes</summary>
Assisted-by: AI
---
Full diff: https://github.com/llvm/llvm-project/pull/218161.diff
8 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCV.h (+9-2)
- (modified) llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp (+1-1)
- (modified) llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp (+38-22)
- (modified) llvm/lib/Target/RISCV/RISCVPassRegistry.def (+2)
- (modified) llvm/lib/Target/RISCV/RISCVTargetMachine.cpp (+2-2)
- (modified) llvm/test/CodeGen/RISCV/O1-newpm-pipeline.ll (+1)
- (modified) llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll (+1)
- (added) llvm/test/CodeGen/RISCV/expand-atomic-pseudo.mir (+44)
``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCV.h b/llvm/lib/Target/RISCV/RISCV.h
index f6ab1d2b54365..d6581cb1525f4 100644
--- a/llvm/lib/Target/RISCV/RISCV.h
+++ b/llvm/lib/Target/RISCV/RISCV.h
@@ -133,8 +133,15 @@ class RISCVPreRAExpandPseudoPass
FunctionPass *createRISCVPreRAExpandPseudoLegacyPass();
void initializeRISCVPreRAExpandPseudoLegacyPass(PassRegistry &);
-FunctionPass *createRISCVExpandAtomicPseudoPass();
-void initializeRISCVExpandAtomicPseudoPass(PassRegistry &);
+class RISCVExpandAtomicPseudoPass
+ : public RequiredPassInfoMixin<RISCVExpandAtomicPseudoPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
+FunctionPass *createRISCVExpandAtomicPseudoLegacyPass();
+void initializeRISCVExpandAtomicPseudoLegacyPass(PassRegistry &);
FunctionPass *createRISCVInsertVSETVLIPass();
void initializeRISCVInsertVSETVLIPass(PassRegistry &);
diff --git a/llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp b/llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
index b59fb76018051..e708748949d1a 100644
--- a/llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
@@ -184,7 +184,7 @@ void RISCVCodeGenPassBuilder::addPreEmitPass2(PassManagerWrapper &PMW) {
// TODO: RISCVQCRelaxMarkingPass
}
- // TODO: RISCVExpandAtomicPseudoPass
+ addMachineFunctionPass(RISCVExpandAtomicPseudoPass(), PMW);
// KCFI indirect call checks are lowered to a bundle.
addMachineFunctionPass(
diff --git a/llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp b/llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp
index 9bd66a43717e7..b647fed6a2e6d 100644
--- a/llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp
+++ b/llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp
@@ -28,19 +28,11 @@ using namespace llvm;
namespace {
-class RISCVExpandAtomicPseudo : public MachineFunctionPass {
+class RISCVExpandAtomicPseudoImpl {
public:
const RISCVSubtarget *STI;
const RISCVInstrInfo *TII;
- static char ID;
-
- RISCVExpandAtomicPseudo() : MachineFunctionPass(ID) {}
-
- bool runOnMachineFunction(MachineFunction &MF) override;
-
- StringRef getPassName() const override {
- return RISCV_EXPAND_ATOMIC_PSEUDO_NAME;
- }
+ bool run(MachineFunction &MF);
private:
bool expandMBB(MachineBasicBlock &MBB);
@@ -68,9 +60,24 @@ class RISCVExpandAtomicPseudo : public MachineFunctionPass {
#endif
};
-char RISCVExpandAtomicPseudo::ID = 0;
+class RISCVExpandAtomicPseudoLegacy : public MachineFunctionPass {
+public:
+ static char ID;
+
+ RISCVExpandAtomicPseudoLegacy() : MachineFunctionPass(ID) {}
+
+ bool runOnMachineFunction(MachineFunction &MF) override {
+ return RISCVExpandAtomicPseudoImpl().run(MF);
+ }
+
+ StringRef getPassName() const override {
+ return RISCV_EXPAND_ATOMIC_PSEUDO_NAME;
+ }
+};
+
+char RISCVExpandAtomicPseudoLegacy::ID = 0;
-bool RISCVExpandAtomicPseudo::runOnMachineFunction(MachineFunction &MF) {
+bool RISCVExpandAtomicPseudoImpl::run(MachineFunction &MF) {
STI = &MF.getSubtarget<RISCVSubtarget>();
TII = STI->getInstrInfo();
@@ -89,7 +96,7 @@ bool RISCVExpandAtomicPseudo::runOnMachineFunction(MachineFunction &MF) {
return Modified;
}
-bool RISCVExpandAtomicPseudo::expandMBB(MachineBasicBlock &MBB) {
+bool RISCVExpandAtomicPseudoImpl::expandMBB(MachineBasicBlock &MBB) {
bool Modified = false;
MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
@@ -102,9 +109,9 @@ bool RISCVExpandAtomicPseudo::expandMBB(MachineBasicBlock &MBB) {
return Modified;
}
-bool RISCVExpandAtomicPseudo::expandMI(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- MachineBasicBlock::iterator &NextMBBI) {
+bool RISCVExpandAtomicPseudoImpl::expandMI(
+ MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ MachineBasicBlock::iterator &NextMBBI) {
// RISCVInstrInfo::getInstSizeInBytes expects that the total size of the
// expanded instructions for each pseudo is correct in the Size field of the
// tablegen definition for the pseudo.
@@ -491,7 +498,7 @@ static void doMaskedAtomicBinOpExpansion(const RISCVInstrInfo *TII,
.addMBB(LoopMBB);
}
-bool RISCVExpandAtomicPseudo::expandAtomicBinOp(
+bool RISCVExpandAtomicPseudoImpl::expandAtomicBinOp(
MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
AtomicRMWInst::BinOp BinOp, bool IsMasked, int Width,
MachineBasicBlock::iterator &NextMBBI) {
@@ -698,7 +705,7 @@ static void doMaskedAtomicMinMaxOpExpansion(
.addMBB(LoopHeadMBB);
}
-bool RISCVExpandAtomicPseudo::expandAtomicMinMaxOp(
+bool RISCVExpandAtomicPseudoImpl::expandAtomicMinMaxOp(
MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
AtomicRMWInst::BinOp BinOp, bool IsMasked, int Width,
MachineBasicBlock::iterator &NextMBBI) {
@@ -816,7 +823,7 @@ bool tryToFoldBNEOnCmpXchgResult(MachineBasicBlock &MBB,
return true;
}
-bool RISCVExpandAtomicPseudo::expandAtomicCmpXchg(
+bool RISCVExpandAtomicPseudoImpl::expandAtomicCmpXchg(
MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, bool IsMasked,
int Width, MachineBasicBlock::iterator &NextMBBI) {
MachineInstr &MI = *MBBI;
@@ -924,9 +931,18 @@ bool RISCVExpandAtomicPseudo::expandAtomicCmpXchg(
} // end of anonymous namespace
-INITIALIZE_PASS(RISCVExpandAtomicPseudo, "riscv-expand-atomic-pseudo",
+INITIALIZE_PASS(RISCVExpandAtomicPseudoLegacy, "riscv-expand-atomic-pseudo",
RISCV_EXPAND_ATOMIC_PSEUDO_NAME, false, false)
-FunctionPass *llvm::createRISCVExpandAtomicPseudoPass() {
- return new RISCVExpandAtomicPseudo();
+FunctionPass *llvm::createRISCVExpandAtomicPseudoLegacyPass() {
+ return new RISCVExpandAtomicPseudoLegacy();
+}
+
+PreservedAnalyses
+RISCVExpandAtomicPseudoPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ bool Changed = RISCVExpandAtomicPseudoImpl().run(MF);
+ if (!Changed)
+ return PreservedAnalyses::all();
+ return getMachineFunctionPassPreservedAnalyses();
}
diff --git a/llvm/lib/Target/RISCV/RISCVPassRegistry.def b/llvm/lib/Target/RISCV/RISCVPassRegistry.def
index f2510145fe064..7ccdbd3ed77ef 100644
--- a/llvm/lib/Target/RISCV/RISCVPassRegistry.def
+++ b/llvm/lib/Target/RISCV/RISCVPassRegistry.def
@@ -33,6 +33,8 @@ FUNCTION_PASS("riscv-zacas-abi-fix", RISCVZacasABIFixPass(this))
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
#endif
MACHINE_FUNCTION_PASS("riscv-asm-printer", RISCVAsmPrinterPass())
+MACHINE_FUNCTION_PASS("riscv-expand-atomic-pseudo",
+ RISCVExpandAtomicPseudoPass())
MACHINE_FUNCTION_PASS("riscv-expand-pseudo", RISCVExpandPseudoPass())
MACHINE_FUNCTION_PASS("riscv-fold-mem-offset", RISCVFoldMemOffsetPass())
MACHINE_FUNCTION_PASS("riscv-isel", RISCVISelDAGToDAGPass(*this, getOptLevel()))
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
index d0b8c06d02afe..813705fa72d52 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -148,7 +148,7 @@ extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
initializeRISCVIndirectBranchTrackingPass(*PR);
initializeRISCVLoadStoreOptPass(*PR);
initializeRISCVPreAllocZilsdOptPass(*PR);
- initializeRISCVExpandAtomicPseudoPass(*PR);
+ initializeRISCVExpandAtomicPseudoLegacyPass(*PR);
initializeRISCVRedundantCopyEliminationPass(*PR);
initializeRISCVAsmPrinterPass(*PR);
initializeRISCVPromoteConstantPass(*PR);
@@ -599,7 +599,7 @@ void RISCVPassConfig::addPreEmitPass2() {
// Schedule the expansion of AMOs at the last possible moment, avoiding the
// possibility for other passes to break the requirements for forward
// progress in the LR/SC block.
- addPass(createRISCVExpandAtomicPseudoPass());
+ addPass(createRISCVExpandAtomicPseudoLegacyPass());
// KCFI indirect call checks are lowered to a bundle.
addPass(createUnpackMachineBundlesLegacy([&](const MachineFunction &MF) {
diff --git a/llvm/test/CodeGen/RISCV/O1-newpm-pipeline.ll b/llvm/test/CodeGen/RISCV/O1-newpm-pipeline.ll
index b3fdb19aefe15..008380b4fc839 100644
--- a/llvm/test/CodeGen/RISCV/O1-newpm-pipeline.ll
+++ b/llvm/test/CodeGen/RISCV/O1-newpm-pipeline.ll
@@ -104,6 +104,7 @@
; CHECK-NEXT: machine-function
; CHECK-NEXT: stack-frame-layout
; CHECK-NEXT: riscv-expand-pseudo
+; CHECK-NEXT: riscv-expand-atomic-pseudo
; CHECK-NEXT: unpack-mi-bundles
; CHECK-NEXT: verify
; CHECK-NEXT: riscv-asm-printer
diff --git a/llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll b/llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll
index 2173279594217..7c0312a9fb8dd 100644
--- a/llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll
+++ b/llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll
@@ -105,6 +105,7 @@
; CHECK-NEXT: machine-function
; CHECK-NEXT: stack-frame-layout
; CHECK-NEXT: riscv-expand-pseudo
+; CHECK-NEXT: riscv-expand-atomic-pseudo
; CHECK-NEXT: unpack-mi-bundles
; CHECK-NEXT: verify
; CHECK-NEXT: riscv-asm-printer
diff --git a/llvm/test/CodeGen/RISCV/expand-atomic-pseudo.mir b/llvm/test/CodeGen/RISCV/expand-atomic-pseudo.mir
new file mode 100644
index 0000000000000..c6681ed842e09
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/expand-atomic-pseudo.mir
@@ -0,0 +1,44 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+# RUN: llc -mtriple=riscv32 -mattr=+a -run-pass=riscv-expand-atomic-pseudo \
+# RUN: %s -o - | FileCheck %s
+# RUN: llc -mtriple=riscv64 -mattr=+a -run-pass=riscv-expand-atomic-pseudo \
+# RUN: %s -o - | FileCheck %s
+# RUN: llc -mtriple=riscv32 -mattr=+a -passes=riscv-expand-atomic-pseudo \
+# RUN: %s -o - | FileCheck %s
+# RUN: llc -mtriple=riscv64 -mattr=+a -passes=riscv-expand-atomic-pseudo \
+# RUN: %s -o - | FileCheck %s
+
+--- |
+ define void @test() #0 {
+ ret void
+ }
+
+ attributes #0 = { noinline optnone }
+...
+---
+name: test
+tracksRegLiveness: true
+noVRegs: true
+body: |
+ bb.0:
+ liveins: $x10, $x11
+
+ ; CHECK-LABEL: name: test
+ ; CHECK: successors: %bb.1(0x80000000)
+ ; CHECK-NEXT: liveins: $x10, $x11
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: .1:
+ ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK-NEXT: liveins: $x10, $x11
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $x12 = LR_W $x10
+ ; CHECK-NEXT: $x13 = AND $x12, $x11
+ ; CHECK-NEXT: $x13 = XORI $x13, -1
+ ; CHECK-NEXT: $x13 = SC_W $x13, $x10
+ ; CHECK-NEXT: BNE $x13, $x0, %bb.1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: .2:
+ ; CHECK-NEXT: PseudoRET
+ early-clobber $x12, early-clobber $x13 = PseudoAtomicLoadNand32 $x10, $x11, 2
+ PseudoRET
+...
``````````
</details>
https://github.com/llvm/llvm-project/pull/218161
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