[llvm] [X86] Require legal result types for f32 estimates (PR #217810)

[Simon Pilgrim via llvm-commits]

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@@ -0,0 +1,69 @@
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=skx -mattr=+soft-float \
+; RUN:   -verify-machineinstrs -o /dev/null < %s
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 \
+; RUN:   -mattr=+avx,+soft-float -verify-machineinstrs -o /dev/null < %s
+
+declare float @llvm.sqrt.f32(float)
+declare <4 x float> @llvm.sqrt.v4f32(<4 x float>)
+declare <8 x float> @llvm.sqrt.v8f32(<8 x float>)
+declare <16 x float> @llvm.sqrt.v16f32(<16 x float>)
+
+define float @recip_f32(float %n, float %d) #0 {
+  %q = fdiv arcp ninf float %n, %d
+  ret float %q
+}
+
+define <4 x float> @recip_v4f32(<4 x float> %n, <4 x float> %d) #2 {
+  %q = fdiv arcp ninf <4 x float> %n, %d
+  ret <4 x float> %q
+}
+
+define <8 x float> @recip_v8f32(<8 x float> %n, <8 x float> %d) #2 {
+  %q = fdiv arcp ninf <8 x float> %n, %d
+  ret <8 x float> %q
+}
+
+define <16 x float> @recip_v16f32(<16 x float> %n, <16 x float> %d) #0 {
+  %q = fdiv arcp ninf <16 x float> %n, %d
+  ret <16 x float> %q
+}
+
+define float @rsqrt_f32(float %x) #1 {
+  %sqrt = call afn ninf float @llvm.sqrt.f32(float %x)
+  %q = fdiv arcp ninf float 1.0, %sqrt
+  ret float %q
+}
+
+define <4 x float> @rsqrt_v4f32(<4 x float> %x) #1 {
+  %sqrt = call afn ninf <4 x float> @llvm.sqrt.v4f32(<4 x float> %x)
+  %q = fdiv arcp ninf <4 x float>
+      <float 1.0, float 1.0, float 1.0, float 1.0>, %sqrt
+  ret <4 x float> %q
+}
+
+define <16 x float> @rsqrt_v16f32(<16 x float> %x) #1 {
+  %sqrt = call afn ninf <16 x float> @llvm.sqrt.v16f32(<16 x float> %x)
+  %q = fdiv arcp ninf <16 x float>
+      <float 1.0, float 1.0, float 1.0, float 1.0,
+       float 1.0, float 1.0, float 1.0, float 1.0,
+       float 1.0, float 1.0, float 1.0, float 1.0,
+       float 1.0, float 1.0, float 1.0, float 1.0>,
+      %sqrt
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RKSimon wrote:

use splat and put it all one line - same for others

https://github.com/llvm/llvm-project/pull/217810