[llvm] [SelectionDAG] Avoid irregular INSERT_SUBVECTOR when widening CTTZ_ELTS (PR #218019)

[Simon Pilgrim via llvm-commits]

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@@ -101,5 +101,24 @@ define i8 @ctz_v8i16_poison(<8 x i16> %a) {
   ret i8 %res
 }
 
+; Irregular predicate vectors widen to a power-of-two number of lanes. The
+; widened lanes must be active so an all-zero input returns the original lane
+; count, without requiring an irregular INSERT_SUBVECTOR during legalization.
+define i32 @ctz_zero_v17i1() {
+; CHECK-LABEL: ctz_zero_v17i1:
+; CHECK:         retq
+  %res = call i32 @llvm.experimental.cttz.elts.i32.v17i1(<17 x i1> zeroinitializer, i1 false)
+  ret i32 %res
+}
+
+define i32 @ctz_zero_v31i1() {
+; CHECK-LABEL: ctz_zero_v31i1:
+; CHECK:         retq
+  %res = call i32 @llvm.experimental.cttz.elts.i32.v31i1(<31 x i1> zeroinitializer, i1 false)
+  ret i32 %res
+}
+
 declare i8 @llvm.experimental.cttz.elts.i8.v8i16(<8 x i16>, i1)
 declare i16 @llvm.experimental.cttz.elts.i16.v4i32(<4 x i32>, i1)
+declare i32 @llvm.experimental.cttz.elts.i32.v17i1(<17 x i1>, i1)
+declare i32 @llvm.experimental.cttz.elts.i32.v31i1(<31 x i1>, i1)
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RKSimon wrote:

remove unnecessary intrinsic forward declarations 

https://github.com/llvm/llvm-project/pull/218019