[llvm] 823eb94 - [AArch64][GlobalISel] Use integer types for atomic cmpxchg lowering. (#215461)

[via llvm-commits]

Author: David Green
Date: 2026-08-22T07:36:58Z
New Revision: 823eb940275e112eaa7098617f1d1c8f4f8a7ef5

URL: https://github.com/llvm/llvm-project/commit/823eb940275e112eaa7098617f1d1c8f4f8a7ef5
DIFF: https://github.com/llvm/llvm-project/commit/823eb940275e112eaa7098617f1d1c8f4f8a7ef5.diff

LOG: [AArch64][GlobalISel] Use integer types for atomic cmpxchg lowering. (#215461)

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index c3fa4bb56f6bb..194b69d21e002 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -2521,7 +2521,7 @@ bool AArch64LegalizerInfo::legalizeAtomicCmpxchg128(
       break;
     }
 
-    LLT s128 = LLT::scalar(128);
+    LLT s128 = LLT::integer(128);
     auto CASDst = MRI.createGenericVirtualRegister(s128);
     auto CASDesired = MRI.createGenericVirtualRegister(s128);
     auto CASNew = MRI.createGenericVirtualRegister(s128);

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir
index 61b3f1230ebe0..09b5ed5bd8548 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmpxchg-128.mir
@@ -39,11 +39,11 @@ body:             |
     ; CHECK-LSE-NEXT: [[COPY2:%[0-9]+]]:_(i64) = COPY $x2
     ; CHECK-LSE-NEXT: [[COPY3:%[0-9]+]]:_(i64) = COPY $x3
     ; CHECK-LSE-NEXT: [[COPY4:%[0-9]+]]:_(i64) = COPY $x4
-    ; CHECK-LSE-NEXT: [[REG_SEQUENCE:%[0-9]+]]:xseqpairsclass(s128) = REG_SEQUENCE [[COPY1]](i64), %subreg.sube64, [[COPY2]](i64), %subreg.subo64
-    ; CHECK-LSE-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:xseqpairsclass(s128) = REG_SEQUENCE [[COPY3]](i64), %subreg.sube64, [[COPY4]](i64), %subreg.subo64
-    ; CHECK-LSE-NEXT: [[CASPAX:%[0-9]+]]:xseqpairsclass(s128) = CASPAX [[REG_SEQUENCE]](s128), [[REG_SEQUENCE1]](s128), [[COPY]](p0) :: (load store acquire acquire (i128))
-    ; CHECK-LSE-NEXT: [[EXTRACT:%[0-9]+]]:_(i64) = G_EXTRACT [[CASPAX]](s128), 0
-    ; CHECK-LSE-NEXT: [[EXTRACT1:%[0-9]+]]:_(i64) = G_EXTRACT [[CASPAX]](s128), 64
+    ; CHECK-LSE-NEXT: [[REG_SEQUENCE:%[0-9]+]]:xseqpairsclass(i128) = REG_SEQUENCE [[COPY1]](i64), %subreg.sube64, [[COPY2]](i64), %subreg.subo64
+    ; CHECK-LSE-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:xseqpairsclass(i128) = REG_SEQUENCE [[COPY3]](i64), %subreg.sube64, [[COPY4]](i64), %subreg.subo64
+    ; CHECK-LSE-NEXT: [[CASPAX:%[0-9]+]]:xseqpairsclass(i128) = CASPAX [[REG_SEQUENCE]](i128), [[REG_SEQUENCE1]](i128), [[COPY]](p0) :: (load store acquire acquire (i128))
+    ; CHECK-LSE-NEXT: [[EXTRACT:%[0-9]+]]:_(i64) = G_EXTRACT [[CASPAX]](i128), 0
+    ; CHECK-LSE-NEXT: [[EXTRACT1:%[0-9]+]]:_(i64) = G_EXTRACT [[CASPAX]](i128), 64
     ; CHECK-LSE-NEXT: [[MV:%[0-9]+]]:_(i128) = G_MERGE_VALUES [[EXTRACT]](i64), [[EXTRACT1]](i64)
     ; CHECK-LSE-NEXT: [[COPY5:%[0-9]+]]:_(i128) = COPY [[MV]](i128)
     ; CHECK-LSE-NEXT: G_STORE [[COPY5]](i128), [[COPY]](p0) :: (store (i128))