[clang] [llvm] [RISCV][MC] Add experimental Smidctrl, Ssidctrl, Smnip, and Ssnip support (PR #218108)

[Zeyi Xu via llvm-commits]

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@@ -1130,6 +1139,15 @@ def HasStdExtSsip : Predicate<"Subtarget->hasStdExtSsip()">,
                         "'Ssip' (Support for Interrupt Handler Push/Pop at "
                         "Supervisor Level)">;
 
+def FeatureStdExtSmnip
+    : RISCVExperimentalExtension<0, 20,
+                                 "Nested Interrupt Preemption Support at Machine Level",
+                                 [FeatureStdExtSmidctrl]>;
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zeyi2 wrote:

The `Smnip` and `Ssnip` dependencies are specified [here](https://github.com/riscv/riscv-fast-interrupt/blob/b623d1262ed40a255fd290333d8e0c6d0c44b2e8/src/aclic.adoc?plain=1#L684-L689).

https://github.com/llvm/llvm-project/pull/218108