[llvm] [AMDGPU] Reject DPP combine when old is narrower than dst (PR #217894)

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llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Arseniy Obolenskiy (aobolensk)

<details>
<summary>Changes</summary>

Old is copied from the mov dst class, but the combined dst can be wider (e.g. V_CVT_F64_I32), making old illegal for it

---
Full diff: https://github.com/llvm/llvm-project/pull/217894.diff


2 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp (+6) 
- (modified) llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir (+18) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp b/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
index 9d22757b4514a..08585d62f54b7 100644
--- a/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
@@ -261,6 +261,12 @@ MachineInstr *GCNDPPCombine::createDPPInst(MachineInstr &OrigMI,
       DPPInst.addReg(CombOldVGPR.Reg, getUndefRegState(!Def),
                      CombOldVGPR.SubReg);
       ++NumOperands;
+
+      if (!TII->isOperandLegal(*DPPInst, OldIdx)) {
+        LLVM_DEBUG(dbgs() << "  failed: old operand is illegal\n");
+        Fail = true;
+        break;
+      }
     } else if (TII->isVOPC(DPPOp) || (TII->isVOP3(DPPOp) && OrigOpE32 != -1 &&
                                       TII->isVOPC(OrigOpE32))) {
       // VOPC DPP and VOPC promoted to VOP3 DPP do not have an old operand
diff --git a/llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir b/llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
index b7c884c7995e7..63a807d345486 100644
--- a/llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
+++ b/llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
@@ -950,3 +950,21 @@ body:             |
     %10:vgpr_32 = V_MOV_B32_dpp %3, %0, 1, 15, 15, 1, implicit $exec
     %11:vgpr_32 = V_FMA_MIX_F32 12, %10, 12, %1, 12, %2, 0, 0, 0, implicit $mode, implicit $exec
 ...
+
+# GCN-LABEL: name: dpp_64bit_dst_32bit_old
+# GCN: %2:vgpr_32 = V_MOV_B32_dpp %1, %0, 85, 15, 15, 1, implicit $exec
+# GCN: %3:vreg_64 = V_CVT_F64_I32_e64 %2, 0, 0, implicit $mode, implicit $exec
+
+name: dpp_64bit_dst_32bit_old
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $vgpr0
+
+    %0:vgpr_32 = COPY $vgpr0
+    %1:vgpr_32 = IMPLICIT_DEF
+    ; should not be combined: old is 32-bit but V_CVT_F64_I32 dst is 64-bit
+    %2:vgpr_32 = V_MOV_B32_dpp %1, %0, 85, 15, 15, 1, implicit $exec
+    %3:vreg_64 = V_CVT_F64_I32_e64 %2, 0, 0, implicit $mode, implicit $exec
+    S_ENDPGM 0, implicit %3
+...

``````````

</details>


https://github.com/llvm/llvm-project/pull/217894