[llvm] 0fd0200 - [AMDGPU] Make use of !ne. NFC. (#217855)

via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 21 02:48:35 PDT 2026


Author: Jay Foad
Date: 2026-08-21T09:48:29Z
New Revision: 0fd020013b40a0b60593b6147616b2034efcb76e

URL: https://github.com/llvm/llvm-project/commit/0fd020013b40a0b60593b6147616b2034efcb76e
DIFF: https://github.com/llvm/llvm-project/commit/0fd020013b40a0b60593b6147616b2034efcb76e.diff

LOG: [AMDGPU] Make use of !ne. NFC. (#217855)

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInstructions.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index 36cacfd47f62c..c2fe750371528 100644
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -1933,7 +1933,7 @@ foreach Index = 0-31 in {
 // 16-bit bitcast
 foreach vt = Reg16Types.types in {
   foreach st = Reg16Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VGPR_32>;
       def : BitConvert <vt, st, SReg_32>;
     }
@@ -1943,7 +1943,7 @@ foreach vt = Reg16Types.types in {
 // 32-bit bitcast
 foreach vt = Reg32DataTypes.types in {
   foreach st = Reg32DataTypes.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VGPR_32>;
       def : BitConvert <vt, st, SReg_32>;
     }
@@ -1954,7 +1954,7 @@ foreach vt = Reg32DataTypes.types in {
 // 64-bit bitcast
 foreach vt = Reg64DataTypes.types in {
   foreach st = Reg64DataTypes.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VReg_64>;
     }
   }
@@ -1964,7 +1964,7 @@ foreach vt = Reg64DataTypes.types in {
 // 96-bit bitcast
 foreach vt = Reg96Types.types in {
   foreach st = Reg96Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, SGPR_96>;
     }
   }
@@ -1974,7 +1974,7 @@ foreach vt = Reg96Types.types in {
 // 128-bit bitcast
 foreach vt = Reg128Types.types in {
   foreach st = Reg128Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VReg_128>;
       def : BitConvert <vt, st, SReg_128>;
     }
@@ -1985,7 +1985,7 @@ foreach vt = Reg128Types.types in {
 // 160-bit bitcast
 foreach vt = Reg160Types.types in {
   foreach st = Reg160Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VReg_160>;
       def : BitConvert <vt, st, SReg_160>;
     }
@@ -1995,7 +1995,7 @@ foreach vt = Reg160Types.types in {
 // 192-bit bitcast
 foreach vt = Reg192Types.types in {
   foreach st = Reg192Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VReg_192>;
       def : BitConvert <vt, st, SReg_192>;
     }
@@ -2005,7 +2005,7 @@ foreach vt = Reg192Types.types in {
 // 224-bit bitcast
 foreach vt = Reg224Types.types in {
   foreach st = Reg224Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VReg_224>;
       def : BitConvert <vt, st, SReg_224>;
     }
@@ -2016,7 +2016,7 @@ foreach vt = Reg224Types.types in {
 // 256-bit bitcast
 foreach vt = Reg256Types.types in {
   foreach st = Reg256Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VReg_256>;
       def : BitConvert <vt, st, SReg_256>;
     }
@@ -2027,7 +2027,7 @@ foreach vt = Reg256Types.types in {
 // 288-bit bitcast
 foreach vt = Reg288Types.types in {
   foreach st = Reg288Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VReg_288>;
       def : BitConvert <vt, st, SReg_288>;
     }
@@ -2037,7 +2037,7 @@ foreach vt = Reg288Types.types in {
 // 320-bit bitcast
 foreach vt = Reg320Types.types in {
   foreach st = Reg320Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VReg_320>;
       def : BitConvert <vt, st, SReg_320>;
     }
@@ -2047,7 +2047,7 @@ foreach vt = Reg320Types.types in {
 // 320-bit bitcast
 foreach vt = Reg352Types.types in {
   foreach st = Reg352Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VReg_352>;
       def : BitConvert <vt, st, SReg_352>;
     }
@@ -2057,7 +2057,7 @@ foreach vt = Reg352Types.types in {
 // 384-bit bitcast
 foreach vt = Reg384Types.types in {
   foreach st = Reg384Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VReg_384>;
       def : BitConvert <vt, st, SReg_384>;
     }
@@ -2067,7 +2067,7 @@ foreach vt = Reg384Types.types in {
 // 512-bit bitcast
 foreach vt = Reg512Types.types in {
   foreach st = Reg512Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VReg_512>;
       def : BitConvert <vt, st, SReg_512>;
     }
@@ -2078,7 +2078,7 @@ foreach vt = Reg512Types.types in {
 // 1024-bit bitcast
 foreach vt = Reg1024Types.types in {
   foreach st = Reg1024Types.types in {
-    if !not(!eq (vt, st)) then {
+    if !ne(vt, st) then {
       def : BitConvert <vt, st, VReg_1024>;
       def : BitConvert <vt, st, SReg_1024>;
     }


        


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