[llvm] [X86] Avoid shl->mul lowbit-isolate fold on Zen when unprofitable (PR #217776)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 20 22:18:30 PDT 2026
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@@ -832,6 +832,12 @@ def TuningPreferMaskRegisters
"Prefer AVX512 mask registers over PTEST/MOVMSK",
[], InlineIgnore>;
+def TuningPreferShlOverBlsiMul
+ : SubtargetFeature<"prefer-shl-over-blsi-mul", "PreferShlOverBlsiMul", "true",
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Andarwinux wrote:
Personally, I think this is unnecessary.
https://godbolt.org/z/qnMhv3TEn
Since these two sequences show identical performance on Intel, to ensure this fold is as active as possible in real-world, it should be unconditionally.
https://github.com/llvm/llvm-project/pull/217776
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