[llvm] [RISCV] Emit constant on RHS of ADD. NFC (PR #217730)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 20 11:49:08 PDT 2026
https://github.com/topperc created https://github.com/llvm/llvm-project/pull/217730
Avoids needing to canonicalize later.
>From c12495ee07cd5e78459d731537b6fe8a5dc2e0bd Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 20 Aug 2026 11:46:11 -0700
Subject: [PATCH] [RISCV] Emit constant on RHS of ADD. NFC
Avoids needing to canonicalize later.
---
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 3aceff8a6497d..0208816a8f8a8 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -10630,13 +10630,13 @@ SDValue RISCVTargetLowering::lowerSELECT(SDValue Op, SelectionDAG &DAG) const {
if ((TrueVal - FalseVal).isPowerOf2() && FalseVal.isSignedIntN(12)) {
SDValue Log2 = DAG.getConstant((TrueVal - FalseVal).logBase2(), DL, VT);
SDValue BitDiff = DAG.getNode(ISD::SHL, DL, VT, CondV, Log2);
- return DAG.getNode(ISD::ADD, DL, VT, FalseV, BitDiff);
+ return DAG.getNode(ISD::ADD, DL, VT, BitDiff, FalseV);
}
if ((FalseVal - TrueVal).isPowerOf2() && TrueVal.isSignedIntN(12)) {
SDValue Log2 = DAG.getConstant((FalseVal - TrueVal).logBase2(), DL, VT);
CondV = DAG.getLogicalNOT(DL, CondV, CondV->getValueType(0));
SDValue BitDiff = DAG.getNode(ISD::SHL, DL, VT, CondV, Log2);
- return DAG.getNode(ISD::ADD, DL, VT, TrueV, BitDiff);
+ return DAG.getNode(ISD::ADD, DL, VT, BitDiff, TrueV);
}
auto getCost = [&](const APInt &Delta, const APInt &Addend) {
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