[llvm] [AMDGPU][TTI] Refine gfx9 packed FP32 SLP costs for pair formation and shuffles (PR #208572)

[Krzysztof Drewniak via llvm-commits]

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@@ -1024,31 +1024,38 @@ define amdgpu_kernel void @combine_v4f32_to_v8i16(
 ; CHECK-OPT-LABEL: define amdgpu_kernel void @combine_v4f32_to_v8i16(
 ; CHECK-OPT-SAME: ptr addrspace(1) [[OUT:%.*]], <4 x float> [[SRC:%.*]], i1 [[COND:%.*]]) {
 ; CHECK-OPT-NEXT:  [[ENTRY:.*:]]
-; CHECK-OPT-NEXT:    [[COMBINED_SEL:%.*]] = select i1 [[COND]], <4 x float> [[SRC]], <4 x float> zeroinitializer
-; CHECK-OPT-NEXT:    [[COMBINED_BC:%.*]] = bitcast <4 x float> [[COMBINED_SEL]] to <8 x i16>
-; CHECK-OPT-NEXT:    [[TMP0:%.*]] = extractelement <8 x i16> [[COMBINED_BC]], i64 0
-; CHECK-OPT-NEXT:    [[TMP3:%.*]] = extractelement <8 x i16> [[COMBINED_BC]], i64 1
-; CHECK-OPT-NEXT:    [[TMP5:%.*]] = extractelement <8 x i16> [[COMBINED_BC]], i64 2
-; CHECK-OPT-NEXT:    [[TMP7:%.*]] = extractelement <8 x i16> [[COMBINED_BC]], i64 3
-; CHECK-OPT-NEXT:    [[TMP2:%.*]] = extractelement <8 x i16> [[COMBINED_BC]], i64 4
-; CHECK-OPT-NEXT:    [[TMP4:%.*]] = extractelement <8 x i16> [[COMBINED_BC]], i64 5
-; CHECK-OPT-NEXT:    [[TMP6:%.*]] = extractelement <8 x i16> [[COMBINED_BC]], i64 6
-; CHECK-OPT-NEXT:    [[TMP1:%.*]] = extractelement <8 x i16> [[COMBINED_BC]], i64 7
-; CHECK-OPT-NEXT:    store i16 [[TMP0]], ptr addrspace(1) [[OUT]], align 2
+; CHECK-OPT-NEXT:    [[HALVES:%.*]] = bitcast <4 x float> [[SRC]] to <8 x i16>
+; CHECK-OPT-NEXT:    [[E0:%.*]] = extractelement <8 x i16> [[HALVES]], i64 0
+; CHECK-OPT-NEXT:    [[E1:%.*]] = extractelement <8 x i16> [[HALVES]], i64 1
+; CHECK-OPT-NEXT:    [[E2:%.*]] = extractelement <8 x i16> [[HALVES]], i64 2
+; CHECK-OPT-NEXT:    [[E3:%.*]] = extractelement <8 x i16> [[HALVES]], i64 3
+; CHECK-OPT-NEXT:    [[E4:%.*]] = extractelement <8 x i16> [[HALVES]], i64 4
+; CHECK-OPT-NEXT:    [[E5:%.*]] = extractelement <8 x i16> [[HALVES]], i64 5
+; CHECK-OPT-NEXT:    [[E6:%.*]] = extractelement <8 x i16> [[HALVES]], i64 6
+; CHECK-OPT-NEXT:    [[E7:%.*]] = extractelement <8 x i16> [[HALVES]], i64 7
+; CHECK-OPT-NEXT:    [[S0:%.*]] = select i1 [[COND]], i16 [[E0]], i16 0
+; CHECK-OPT-NEXT:    [[S1:%.*]] = select i1 [[COND]], i16 [[E1]], i16 0
+; CHECK-OPT-NEXT:    [[S2:%.*]] = select i1 [[COND]], i16 [[E2]], i16 0
+; CHECK-OPT-NEXT:    [[S3:%.*]] = select i1 [[COND]], i16 [[E3]], i16 0
+; CHECK-OPT-NEXT:    [[S4:%.*]] = select i1 [[COND]], i16 [[E4]], i16 0
+; CHECK-OPT-NEXT:    [[S5:%.*]] = select i1 [[COND]], i16 [[E5]], i16 0
+; CHECK-OPT-NEXT:    [[S6:%.*]] = select i1 [[COND]], i16 [[E6]], i16 0
+; CHECK-OPT-NEXT:    [[S7:%.*]] = select i1 [[COND]], i16 [[E7]], i16 0
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krzysz00 wrote:

... Maybe this gets done in a different pass, but these `select`s are all with the same condition, so can't they all be folded together?

https://github.com/llvm/llvm-project/pull/208572