[llvm] [X86] Add correct model values for masked stores on Zen 1 and 2 (PR #217254)

Rohan Shenoy via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 20 05:36:45 PDT 2026


222rohan wrote:

> How were these confirmed on real hardware? llvm-exegesis?
@boomanaiden154, I checked it two ways,
1. Checked on this microkernel 
```c
// clang -O0 -mavx2 msk-store.c
// perf stat perf stat -e cycles,ex_ret_ucode_ops -- ./a.out
// divide them by (5000000 * 8)
#include <stdalign.h>

alignas(32) static const int Mask[8] = {-1, 0, -1, 0, -1, 0, -1, 0};
alignas(32) static const int Value[8] = {-1, -1, -1, -1, -1, -1, -1, -1};
int Buffer[128];

int main(void) {
  for (int i = 0; i < 5000000; i++) {
    asm volatile("vmovdqa (%[value]), %%ymm0\n\t"
                 "vmovdqa (%[mask]), %%ymm1\n\t"
                 "vpmaskmovd %%ymm0, %%ymm1,   0(%[ptr])\n\t"
                 "vpmaskmovd %%ymm0, %%ymm1,  64(%[ptr])\n\t"
                 "vpmaskmovd %%ymm0, %%ymm1, 128(%[ptr])\n\t"
                 "vpmaskmovd %%ymm0, %%ymm1, 192(%[ptr])\n\t"
                 "vpmaskmovd %%ymm0, %%ymm1, 256(%[ptr])\n\t"
                 "vpmaskmovd %%ymm0, %%ymm1, 320(%[ptr])\n\t"
                 "vpmaskmovd %%ymm0, %%ymm1, 384(%[ptr])\n\t"
                 "vpmaskmovd %%ymm0, %%ymm1, 448(%[ptr])\n\t"
                 :
                 : [ptr] "r"(Buffer), [mask] "r"(Mask), [value] "r"(Value)
  }
  return 0;
}
```
2. checked using [nanoBench](https://github.com/andreas-abel/nanoBench)

https://github.com/llvm/llvm-project/pull/217254


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