[llvm] [AArch64][NEON] Fold insert(zero, extract(X, 0), 0) -> X when X is known to zero lanes 1-N (PR #213940)

[Paul Walker via llvm-commits]

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paulwalker-arm wrote:

The `INSERT_SUBREG (v16i8 (IMPLICIT_DEF)),...` here means lanes 1-15 will be undefined, but you specifically want them to be zero based on the input DAG. I think you probably want to use `SUBREG_TO_REG` here instead.

https://github.com/llvm/llvm-project/pull/213940