[llvm] [X86] Fold AVX-512 sign-mask compares to MOVMSK (PR #216884)

[Phoebe Wang via llvm-commits]

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@@ -219,7 +221,44 @@ static bool isKMovNarrowing(unsigned VPMOVOpc, unsigned KMOVOpc) {
     llvm_unreachable("Unknown KMOV opcode");
   }
 
-  return KMOVSize < VPMOVBits;
+  return KMOVSize < MaskBits;
+}
+
+static bool isZeroVector(const MachineInstr &MI) {
+  switch (MI.getOpcode()) {
+  case X86::VPXORrr:
+  case X86::VPXORYrr:
+  case X86::VXORPSrr:
+  case X86::VXORPSYrr:
+    return MI.getOperand(1).getReg() == MI.getOperand(2).getReg();
+  default:
+    return false;
+  }
+}
+
+static bool isAllOnesVector(const MachineInstr &MI, bool Is256Bit) {
+  switch (MI.getOpcode()) {
+  case X86::VPCMPEQDrr:
+    return !Is256Bit && MI.getOperand(1).getReg() == MI.getOperand(2).getReg();
+  case X86::VPCMPEQDYrr:
+    return MI.getOperand(1).getReg() == MI.getOperand(2).getReg();
+  default:
+    return false;
+  }
+}
+
+static MachineInstr *getSignMaskConstantDef(MachineInstr &MI, Register Reg,
+                                            bool IsZero, bool Is256Bit,
+                                            const TargetRegisterInfo *TRI) {
+  for (MachineInstr &DefMI : llvm::reverse(llvm::make_range(
+           MI.getParent()->begin(), MachineBasicBlock::iterator(MI)))) {
+    if (!DefMI.modifiesRegister(Reg, TRI))
+      continue;
+    return (IsZero ? isZeroVector(DefMI) : isAllOnesVector(DefMI, Is256Bit))
+               ? &DefMI
+               : nullptr;
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phoebewang wrote:

Is this correct? When IsZero is true, return `isZeroVector(DefMI)`? The format also looks weird

https://github.com/llvm/llvm-project/pull/216884