[llvm] [NewPM] Port CFIInstrInserter to the new pass manager (PR #217494)
Bill Wendling via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 19 16:59:10 PDT 2026
https://github.com/isanbard created https://github.com/llvm/llvm-project/pull/217494
Adds a newPM pass for CFIInstrInserter (cfi-instr-inserter).
- Extracts the pass's working state (MBBVector, CSRLocMap) and logic into a CFIInstrInserterImpl class with a run method, called by both the legacy pass and the new pass manager pass.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass CFIInstrInserterPass, using RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never calls skipFunction, so it always runs unconditionally and should not be skippable in the new PM either. run() unconditionally returns PreservedAnalyses::all(), matching the legacy pass's own AU.setPreservesAll() declaration -- the same shape CFIFixupPass (an already-ported sibling CFI pass) already uses.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder.
- Wires the pass into X86's and RISC-V's newPM pipelines, matching their existing legacy-PM gating conditions:
- X86 replaces an existing TODO inside an already-correct conditional in addPreEmitPass2.
- RISC-V's equivalent TODO had no gating at all. The legacy pipeline gates this pass behind -riscv-enable-cfi-instr-inserter, a flag private to RISCVTargetMachine.cpp and not reachable from RISCVCodeGenPassBuilder.cpp. Uses !TM.Options.EnableCFIFixup instead, which RISCVTargetMachine's constructor already sets to the exact inverse of that flag, avoiding any new cross-TU plumbing.
- Adds -passes=cfi-instr-inserter RUN lines to all nine existing dedicated unit tests (eight X86 .mir, one RISC-V .mir), and updates llc-pipeline-npm.ll's O0/O2 X86 pipeline-dump expectations (verified empirically which triples actually enable the pass).
Assisted-by: Claude Sonnet 5
>From 8548eaec495d9efbf4155e742befaef29f6ede28 Mon Sep 17 00:00:00 2001
From: Bill Wendling <isanbard at gmail.com>
Date: Wed, 19 Aug 2026 16:57:27 -0700
Subject: [PATCH] [NewPM] Port CFIInstrInserter to the new pass manager
Adds a newPM pass for CFIInstrInserter (cfi-instr-inserter).
- Extracts the pass's working state (MBBVector, CSRLocMap) and logic
into a CFIInstrInserterImpl class with a run method, called by both
the legacy pass and the new pass manager pass.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass CFIInstrInserterPass, using
RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never
calls skipFunction, so it always runs unconditionally and should not
be skippable in the new PM either. run() unconditionally returns
PreservedAnalyses::all(), matching the legacy pass's own
AU.setPreservesAll() declaration -- the same shape CFIFixupPass (an
already-ported sibling CFI pass) already uses.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder.
- Wires the pass into X86's and RISC-V's newPM pipelines, matching
their existing legacy-PM gating conditions:
- X86 replaces an existing TODO inside an already-correct
conditional in addPreEmitPass2.
- RISC-V's equivalent TODO had no gating at all. The legacy pipeline
gates this pass behind -riscv-enable-cfi-instr-inserter, a flag
private to RISCVTargetMachine.cpp and not reachable from
RISCVCodeGenPassBuilder.cpp. Uses !TM.Options.EnableCFIFixup
instead, which RISCVTargetMachine's constructor already sets to
the exact inverse of that flag, avoiding any new cross-TU plumbing.
- Adds -passes=cfi-instr-inserter RUN lines to all nine existing
dedicated unit tests (eight X86 .mir, one RISC-V .mir), and updates
llc-pipeline-npm.ll's O0/O2 X86 pipeline-dump expectations (verified
empirically which triples actually enable the pass).
Assisted-by: Claude Sonnet 5
---
llvm/include/llvm/CodeGen/CFIInstrInserter.h | 25 ++++++
llvm/include/llvm/InitializePasses.h | 2 +-
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 1 +
.../llvm/Passes/MachinePassRegistry.def | 2 +-
llvm/lib/CodeGen/CFIInstrInserter.cpp | 78 ++++++++++++-------
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/Passes/PassBuilder.cpp | 1 +
.../Target/RISCV/RISCVCodeGenPassBuilder.cpp | 8 +-
llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp | 6 +-
.../CodeGen/RISCV/cfi-multiple-locations.mir | 4 +
.../cfi-inserter-callee-save-register-2.mir | 2 +
.../X86/cfi-inserter-callee-save-register.mir | 2 +
.../X86/cfi-inserter-cfg-with-merge.mir | 1 +
.../X86/cfi-inserter-noreturnblock.mir | 2 +
.../cfi-inserter-verify-inconsistent-csr.mir | 2 +
.../cfi-inserter-verify-inconsistent-loc.mir | 2 +
...fi-inserter-verify-inconsistent-offset.mir | 2 +
...-inserter-verify-inconsistent-register.mir | 2 +
llvm/test/CodeGen/X86/llc-pipeline-npm.ll | 2 +
19 files changed, 108 insertions(+), 38 deletions(-)
create mode 100644 llvm/include/llvm/CodeGen/CFIInstrInserter.h
diff --git a/llvm/include/llvm/CodeGen/CFIInstrInserter.h b/llvm/include/llvm/CodeGen/CFIInstrInserter.h
new file mode 100644
index 0000000000000..99ffe67df97e4
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/CFIInstrInserter.h
@@ -0,0 +1,25 @@
+//===----------------------------------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_CFIINSTRINSERTER_H
+#define LLVM_CODEGEN_CFIINSTRINSERTER_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+
+class CFIInstrInserterPass
+ : public RequiredPassInfoMixin<CFIInstrInserterPass> {
+public:
+ LLVM_ABI PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
+} // namespace llvm
+
+#endif // LLVM_CODEGEN_CFIINSTRINSERTER_H
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index b5e51e5db037d..e62277e757347 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -75,7 +75,7 @@ LLVM_ABI void initializeCFGSimplifyPassPass(PassRegistry &);
LLVM_ABI void initializeCFGuardPass(PassRegistry &);
LLVM_ABI void initializeCFGuardLongjmpPass(PassRegistry &);
LLVM_ABI void initializeCFIFixupLegacyPass(PassRegistry &);
-LLVM_ABI void initializeCFIInstrInserterPass(PassRegistry &);
+LLVM_ABI void initializeCFIInstrInserterLegacyPass(PassRegistry &);
LLVM_ABI void initializeCallGraphDOTPrinterPass(PassRegistry &);
LLVM_ABI void initializeCallGraphViewerPass(PassRegistry &);
LLVM_ABI void initializeCallGraphWrapperPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index 55ee1c755e4e4..5aff053d4933a 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -26,6 +26,7 @@
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/AsmPrinterAnalysis.h"
#include "llvm/CodeGen/BranchFoldingPass.h"
+#include "llvm/CodeGen/CFIInstrInserter.h"
#include "llvm/CodeGen/CodeGenPrepare.h"
#include "llvm/CodeGen/DeadMachineInstructionElim.h"
#include "llvm/CodeGen/DetectDeadLanes.h"
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 2629280a5d6ac..65e8f3d1ea4c8 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -69,6 +69,7 @@ MACHINE_FUNCTION_PASS("block-placement-stats", MachineBlockPlacementStatsPass())
MACHINE_FUNCTION_PASS("branch-relaxation", BranchRelaxationPass())
MACHINE_FUNCTION_PASS("break-false-deps", BreakFalseDepsPass())
MACHINE_FUNCTION_PASS("cfi-fixup", CFIFixupPass())
+MACHINE_FUNCTION_PASS("cfi-instr-inserter", CFIInstrInserterPass())
MACHINE_FUNCTION_PASS("dead-mi-elimination", DeadMachineInstructionElimPass())
MACHINE_FUNCTION_PASS("detect-dead-lanes", DetectDeadLanesPass())
MACHINE_FUNCTION_PASS("dot-machine-cfg", MachineCFGPrinterPass())
@@ -242,7 +243,6 @@ DUMMY_MACHINE_MODULE_PASS("pseudo-probe-inserter", PseudoProbeInserterPass)
DUMMY_MACHINE_FUNCTION_PASS("bbsections-prepare", BasicBlockSectionsPass)
DUMMY_MACHINE_FUNCTION_PASS("bbsections-profile-reader", BasicBlockSectionsProfileReaderPass)
DUMMY_MACHINE_FUNCTION_PASS("cfguard-longjmp", CFGuardLongjmpPass)
-DUMMY_MACHINE_FUNCTION_PASS("cfi-instr-inserter", CFIInstrInserterPass)
DUMMY_MACHINE_FUNCTION_PASS("eh-cont-guard-targets", EHContGuardTargetsPass)
DUMMY_MACHINE_FUNCTION_PASS("fs-profile-loader", MIRProfileLoaderNewPass)
DUMMY_MACHINE_FUNCTION_PASS("funclet-layout", FuncletLayoutPass)
diff --git a/llvm/lib/CodeGen/CFIInstrInserter.cpp b/llvm/lib/CodeGen/CFIInstrInserter.cpp
index ad81aaa5e276e..7eb8022080c6a 100644
--- a/llvm/lib/CodeGen/CFIInstrInserter.cpp
+++ b/llvm/lib/CodeGen/CFIInstrInserter.cpp
@@ -17,6 +17,7 @@
/// blocks in a function.
//===----------------------------------------------------------------------===//
+#include "llvm/CodeGen/CFIInstrInserter.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
@@ -29,24 +30,15 @@
#include "llvm/MC/MCDwarf.h"
using namespace llvm;
-static cl::opt<bool> VerifyCFI("verify-cfiinstrs",
- cl::desc("Verify Call Frame Information instructions"),
- cl::init(false),
- cl::Hidden);
+static cl::opt<bool>
+ VerifyCFI("verify-cfiinstrs",
+ cl::desc("Verify Call Frame Information instructions"),
+ cl::init(false), cl::Hidden);
namespace {
-class CFIInstrInserter : public MachineFunctionPass {
- public:
- static char ID;
-
- CFIInstrInserter() : MachineFunctionPass(ID) {}
-
- void getAnalysisUsage(AnalysisUsage &AU) const override {
- AU.setPreservesAll();
- MachineFunctionPass::getAnalysisUsage(AU);
- }
-
- bool runOnMachineFunction(MachineFunction &MF) override {
+class CFIInstrInserterImpl {
+public:
+ bool run(MachineFunction &MF) {
if (!MF.needsFrameMoves())
return false;
@@ -195,15 +187,40 @@ class CFIInstrInserter : public MachineFunctionPass {
/// outgoing offset and register of the MBB.
unsigned verify(MachineFunction &MF);
};
-} // namespace
-char CFIInstrInserter::ID = 0;
-INITIALIZE_PASS(CFIInstrInserter, "cfi-instr-inserter",
+class CFIInstrInserterLegacy : public MachineFunctionPass {
+public:
+ static char ID;
+
+ CFIInstrInserterLegacy() : MachineFunctionPass(ID) {}
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
+ AU.setPreservesAll();
+ MachineFunctionPass::getAnalysisUsage(AU);
+ }
+
+ bool runOnMachineFunction(MachineFunction &MF) override {
+ return CFIInstrInserterImpl().run(MF);
+ }
+};
+} // namespace
+
+char CFIInstrInserterLegacy::ID = 0;
+INITIALIZE_PASS(CFIInstrInserterLegacy, "cfi-instr-inserter",
"Check CFA info and insert CFI instructions if needed", false,
false)
-FunctionPass *llvm::createCFIInstrInserter() { return new CFIInstrInserter(); }
+FunctionPass *llvm::createCFIInstrInserter() {
+ return new CFIInstrInserterLegacy();
+}
-void CFIInstrInserter::calculateCFAInfo(MachineFunction &MF) {
+PreservedAnalyses
+CFIInstrInserterPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ CFIInstrInserterImpl().run(MF);
+ return PreservedAnalyses::all();
+}
+
+void CFIInstrInserterImpl::calculateCFAInfo(MachineFunction &MF) {
const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
// Initial CFA offset value i.e. the one valid at the beginning of the
// function.
@@ -236,7 +253,7 @@ void CFIInstrInserter::calculateCFAInfo(MachineFunction &MF) {
updateSuccCFAInfo(MBBVector[MF.front().getNumber()]);
}
-void CFIInstrInserter::calculateOutgoingCFAInfo(MBBCFAInfo &MBBInfo) {
+void CFIInstrInserterImpl::calculateOutgoingCFAInfo(MBBCFAInfo &MBBInfo) {
// Outgoing cfa offset set by the block.
int64_t SetOffset = MBBInfo.IncomingCFAOffset;
// Outgoing cfa register set by the block.
@@ -371,7 +388,7 @@ void CFIInstrInserter::calculateOutgoingCFAInfo(MBBCFAInfo &MBBInfo) {
CSRRestored);
}
-void CFIInstrInserter::updateSuccCFAInfo(MBBCFAInfo &MBBInfo) {
+void CFIInstrInserterImpl::updateSuccCFAInfo(MBBCFAInfo &MBBInfo) {
SmallVector<MachineBasicBlock *, 4> Stack;
Stack.push_back(MBBInfo.MBB);
@@ -391,7 +408,7 @@ void CFIInstrInserter::updateSuccCFAInfo(MBBCFAInfo &MBBInfo) {
} while (!Stack.empty());
}
-bool CFIInstrInserter::insertCFIInstrs(MachineFunction &MF) {
+bool CFIInstrInserterImpl::insertCFIInstrs(MachineFunction &MF) {
const MBBCFAInfo *PrevMBBInfo = &MBBVector[MF.front().getNumber()];
const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
bool InsertedCFIInstr = false;
@@ -399,7 +416,8 @@ bool CFIInstrInserter::insertCFIInstrs(MachineFunction &MF) {
BitVector SetDifference;
for (MachineBasicBlock &MBB : MF) {
// Skip the first MBB in a function
- if (MBB.getNumber() == MF.front().getNumber()) continue;
+ if (MBB.getNumber() == MF.front().getNumber())
+ continue;
const MBBCFAInfo &MBBInfo = MBBVector[MBB.getNumber()];
auto MBBI = MBBInfo.MBB->begin();
@@ -489,8 +507,8 @@ bool CFIInstrInserter::insertCFIInstrs(MachineFunction &MF) {
return InsertedCFIInstr;
}
-void CFIInstrInserter::reportCFAError(const MBBCFAInfo &Pred,
- const MBBCFAInfo &Succ) {
+void CFIInstrInserterImpl::reportCFAError(const MBBCFAInfo &Pred,
+ const MBBCFAInfo &Succ) {
errs() << "*** Inconsistent CFA register and/or offset between pred and succ "
"***\n";
errs() << "Pred: " << Pred.MBB->getName() << " #" << Pred.MBB->getNumber()
@@ -505,8 +523,8 @@ void CFIInstrInserter::reportCFAError(const MBBCFAInfo &Pred,
<< " incoming CFA Offset:" << Succ.IncomingCFAOffset << "\n";
}
-void CFIInstrInserter::reportCSRError(const MBBCFAInfo &Pred,
- const MBBCFAInfo &Succ) {
+void CFIInstrInserterImpl::reportCSRError(const MBBCFAInfo &Pred,
+ const MBBCFAInfo &Succ) {
errs() << "*** Inconsistent CSR Saved between pred and succ in function "
<< Pred.MBB->getParent()->getName() << " ***\n";
errs() << "Pred: " << Pred.MBB->getName() << " #" << Pred.MBB->getNumber()
@@ -521,7 +539,7 @@ void CFIInstrInserter::reportCSRError(const MBBCFAInfo &Pred,
errs() << "\n";
}
-unsigned CFIInstrInserter::verify(MachineFunction &MF) {
+unsigned CFIInstrInserterImpl::verify(MachineFunction &MF) {
unsigned ErrorNum = 0;
for (auto *CurrMBB : depth_first(&MF)) {
const MBBCFAInfo &CurrMBBInfo = MBBVector[CurrMBB->getNumber()];
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 161ccf3b92b4b..c39d0ab151f12 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -29,7 +29,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeBreakFalseDepsLegacyPass(Registry);
initializeCFGuardLongjmpPass(Registry);
initializeCFIFixupLegacyPass(Registry);
- initializeCFIInstrInserterPass(Registry);
+ initializeCFIInstrInserterLegacyPass(Registry);
initializeCheckDebugMachineModuleLegacyPass(Registry);
initializeCodeGenPrepareLegacyPassPass(Registry);
initializeComplexDeinterleavingLegacyPassPass(Registry);
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index e886bf909c833..6f85d699c5d24 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -88,6 +88,7 @@
#include "llvm/CodeGen/BranchRelaxation.h"
#include "llvm/CodeGen/BreakFalseDeps.h"
#include "llvm/CodeGen/CFIFixup.h"
+#include "llvm/CodeGen/CFIInstrInserter.h"
#include "llvm/CodeGen/CodeGenPrepare.h"
#include "llvm/CodeGen/ComplexDeinterleavingPass.h"
#include "llvm/CodeGen/DeadMachineInstructionElim.h"
diff --git a/llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp b/llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
index c614b5a7ff6e6..78c1abde055ed 100644
--- a/llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
@@ -191,7 +191,13 @@ void RISCVCodeGenPassBuilder::addPreEmitPass2(PassManagerWrapper &PMW) const {
}),
PMW);
- // TODO: CFIInstrInserterPass
+ // RISCVTargetMachine's constructor sets Options.EnableCFIFixup to the
+ // inverse of -riscv-enable-cfi-instr-inserter (a flag private to
+ // RISCVTargetMachine.cpp), so checking it here is equivalent to checking
+ // that flag directly -- the two passes solve overlapping problems and
+ // this target picks exactly one.
+ if (!TM.Options.EnableCFIFixup)
+ addMachineFunctionPass(CFIInstrInserterPass(), PMW);
}
void RISCVCodeGenPassBuilder::addAsmPrinterBegin(
diff --git a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
index 36b1210b23eb2..ebfa3a561b6c6 100644
--- a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
@@ -227,10 +227,8 @@ void X86CodeGenPassBuilder::addPreEmitPass2(PassManagerWrapper &PMW) const {
// instructions.
if (!TT.isOSDarwin() &&
(!TT.isOSWindows() ||
- MAI.getExceptionHandlingType() == ExceptionHandling::DwarfCFI)) {
- // TODO(boomanaiden154): Add CFInstrInserterPass here when it has been
- // ported.
- }
+ MAI.getExceptionHandlingType() == ExceptionHandling::DwarfCFI))
+ addMachineFunctionPass(CFIInstrInserterPass(), PMW);
if (TT.isOSWindows()) {
// Identify valid longjmp targets for Windows Control Flow Guard.
diff --git a/llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir b/llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
index 43d8bafd58bd3..58bc9bb6e47f8 100644
--- a/llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
+++ b/llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
@@ -2,6 +2,10 @@
# RUN: -run-pass=cfi-instr-inserter \
# RUN: -riscv-enable-cfi-instr-inserter=true \
# RUN: -o /dev/null 2>&1 | FileCheck %s
+# RUN: not --crash llc %s -mtriple=riscv64 \
+# RUN: -passes=cfi-instr-inserter \
+# RUN: -riscv-enable-cfi-instr-inserter=true \
+# RUN: -o /dev/null 2>&1 | FileCheck %s
# CHECK: LLVM ERROR: Different saved locations for the same CSR
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir b/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
index a08a3166a1285..fd78c3feca641 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
@@ -1,6 +1,8 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
+# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
+# RUN: -passes=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI inserter inserts .cfi_offset/.cfi_register/.cfi_rel_offset
# properly for callee saved registers.
--- |
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir b/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir
index abcb0743aa21b..426c5d7198737 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir
@@ -1,6 +1,8 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
+# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
+# RUN: -passes=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI inserter inserts .cfi_restore properly for
# callee saved registers.
--- |
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir b/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
index ffd1b21370aa3..b8b149b571a8a 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
@@ -1,4 +1,5 @@
# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs -run-pass=cfi-instr-inserter
+# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs -passes=cfi-instr-inserter
--- |
define void @foo() { ret void }
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir b/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
index a1b3a68c85fc3..a2029e01b2a11 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
@@ -1,5 +1,7 @@
# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter
+# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
+# RUN: -passes=cfi-instr-inserter
# Test that CFI verifier does not report inconsistent offset for the
# 'noreturn' block.
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir
index 63957ae5229fa..19eecefa87cae 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir
@@ -1,5 +1,7 @@
# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
+# RUN: -passes=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent csr saved set between bb.end and
# one of its precedessors.
--- |
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
index 8211f8940d27a..ca59b913551e0 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
@@ -1,5 +1,7 @@
# RUN: not --crash llc -o - %s -mtriple=x86_64-- \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - %s -mtriple=x86_64-- \
+# RUN: -passes=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CSR being saved in multiple locations can be caught by
# an assertion.
--- |
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
index fd726b882b561..1cbd8f892c048 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
@@ -1,5 +1,7 @@
# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
+# RUN: -passes=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent offset between bb.end and one of
# its precedessors.
--- |
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
index 30344edc259ce..56bd5dd61ea8f 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
@@ -1,5 +1,7 @@
# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
+# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
+# RUN: -passes=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent register between bb.end and one of
# its precedessors.
--- |
diff --git a/llvm/test/CodeGen/X86/llc-pipeline-npm.ll b/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
index 9b96d201d8676..0b661d9fc84ec 100644
--- a/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+++ b/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
@@ -74,6 +74,7 @@
; O0-NEXT: stack-frame-layout
; O0-NEXT: x86-seses
; O0-NEXT: x86-return-thunks
+; O0-NEXT: cfi-instr-inserter
; O0-NEXT: x86-lvi-ret
; O0-NEXT: verify
; O0-NEXT: x86-asm-printer
@@ -200,6 +201,7 @@
; O2-NEXT: stack-frame-layout
; O2-NEXT: x86-seses
; O2-NEXT: x86-return-thunks
+; O2-NEXT: cfi-instr-inserter
; O2-NEXT: x86-lvi-ret
; O2-NEXT: verify
; O2-NEXT: x86-asm-printer
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