[llvm] [AMDGPU] Optimize SGPR splat reg sequences for packed 64-bit instructions (PR #217182)

[Stanislav Mekhanoshin via llvm-commits]

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@@ -2473,10 +2474,86 @@ bool SIFoldOperandsImpl::tryFoldOMod(MachineInstr &MI) {
   return true;
 }
 
+// Try to optimize SGPR reg sequences that are splat <s, s> or <s, s, s, s>
+// where all uses are PackedSingleSGPR64BitInst, replacing with <s, undef, ...>
+bool SIFoldOperandsImpl::tryFoldSGPRSplatRegSequence(MachineInstr &MI) {
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rampitec wrote:

Shall probably do a subtarget check first that it even has such instructions, not to do checks when they cannot apply.

https://github.com/llvm/llvm-project/pull/217182