[llvm] [NewPM] Port MachineCombiner to the new pass manager (PR #217279)
Bill Wendling via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 19 03:46:20 PDT 2026
https://github.com/isanbard created https://github.com/llvm/llvm-project/pull/217279
Adds a newPM pass for MachineCombiner (machine-combiner).
- Refactors base logic into a MachineCombinerImpl class, with a run method taking analysis pointers (RegisterClassInfo included) rather than pulling them via getAnalysis, which only the legacy Pass subclass has access to.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass MachineCombinerPass, using RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never calls skipFunction, so it always runs unconditionally and should not be skippable in the new PM either.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder.
- Enables MachineCombinerPass in X86CodeGenPassBuilder.
- Updates the existing .mir test to also verify MachineCombinerPass under the new pass manager.
Assisted-by: Claude Sonnet 5
>From 8b9cf6dc55b1a4c59796bbba6578e45f9a8d55fe Mon Sep 17 00:00:00 2001
From: Bill Wendling <morbo at google.com>
Date: Tue, 18 Aug 2026 07:38:57 +0000
Subject: [PATCH] [NewPM] Port MachineCombiner to the new pass manager
Adds a newPM pass for MachineCombiner (machine-combiner).
- Refactors base logic into a MachineCombinerImpl class, with a run
method taking analysis pointers (RegisterClassInfo included) rather
than pulling them via getAnalysis, which only the legacy Pass
subclass has access to.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass MachineCombinerPass, using
RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never
calls skipFunction, so it always runs unconditionally and should not
be skippable in the new PM either.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder.
- Enables MachineCombinerPass in X86CodeGenPassBuilder.
- Updates the existing .mir test to also verify MachineCombinerPass
under the new pass manager.
Assisted-by: Claude Sonnet 5
---
llvm/include/llvm/CodeGen/MachineCombiner.h | 28 ++++
llvm/include/llvm/InitializePasses.h | 2 +-
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 1 +
.../llvm/Passes/MachinePassRegistry.def | 2 +-
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/CodeGen/MachineCombiner.cpp | 155 ++++++++++++------
llvm/lib/Passes/PassBuilder.cpp | 1 +
llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp | 3 +-
llvm/test/CodeGen/X86/llc-pipeline-npm.ll | 2 +
.../test/CodeGen/X86/machine-combiner-dbg.mir | 1 +
10 files changed, 140 insertions(+), 57 deletions(-)
create mode 100644 llvm/include/llvm/CodeGen/MachineCombiner.h
diff --git a/llvm/include/llvm/CodeGen/MachineCombiner.h b/llvm/include/llvm/CodeGen/MachineCombiner.h
new file mode 100644
index 0000000000000..c9479c2d28bef
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/MachineCombiner.h
@@ -0,0 +1,28 @@
+//===----------------------------------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_MACHINECOMBINER_H
+#define LLVM_CODEGEN_MACHINECOMBINER_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+
+class MachineCombinerPass : public RequiredPassInfoMixin<MachineCombinerPass> {
+public:
+ LLVM_ABI PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+
+ MachineFunctionProperties getRequiredProperties() const {
+ return MachineFunctionProperties().setIsSSA();
+ }
+};
+
+} // namespace llvm
+
+#endif // LLVM_CODEGEN_MACHINECOMBINER_H
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index cb7dddbe60218..c225ce4dee3a2 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -198,7 +198,7 @@ LLVM_ABI void
initializeMachineBranchProbabilityInfoWrapperPassPass(PassRegistry &);
LLVM_ABI void initializeMachineCFGPrinterLegacyPass(PassRegistry &);
LLVM_ABI void initializeMachineCSELegacyPass(PassRegistry &);
-LLVM_ABI void initializeMachineCombinerPass(PassRegistry &);
+LLVM_ABI void initializeMachineCombinerLegacyPass(PassRegistry &);
LLVM_ABI void initializeMachineCopyPropagationLegacyPass(PassRegistry &);
LLVM_ABI void initializeMachineCycleInfoPrinterLegacyPass(PassRegistry &);
LLVM_ABI void initializeMachineCycleInfoWrapperPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index ee10aed4eec86..7c6cef652f61c 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -53,6 +53,7 @@
#include "llvm/CodeGen/LowerEmuTLS.h"
#include "llvm/CodeGen/MIRPrinter.h"
#include "llvm/CodeGen/MachineBlockPlacement.h"
+#include "llvm/CodeGen/MachineCombiner.h"
#include "llvm/CodeGen/MachineCSE.h"
#include "llvm/CodeGen/MachineCopyPropagation.h"
#include "llvm/CodeGen/MachineFunctionAnalysis.h"
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index cd7ef9591f93b..3027fe3b84be6 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -86,6 +86,7 @@ MACHINE_FUNCTION_PASS("kcfi", MachineKCFIPass())
MACHINE_FUNCTION_PASS("gc-empty-basic-blocks", GCEmptyBasicBlocksPass())
MACHINE_FUNCTION_PASS("legalizer", LegalizerPass())
MACHINE_FUNCTION_PASS("localstackalloc", LocalStackSlotAllocationPass())
+MACHINE_FUNCTION_PASS("machine-combiner", MachineCombinerPass())
MACHINE_FUNCTION_PASS("machine-cp", MachineCopyPropagationPass())
MACHINE_FUNCTION_PASS("machine-cse", MachineCSEPass())
MACHINE_FUNCTION_PASS("machine-latecleanup", MachineLateInstrsCleanupPass())
@@ -245,7 +246,6 @@ DUMMY_MACHINE_FUNCTION_PASS("fs-profile-loader", MIRProfileLoaderNewPass)
DUMMY_MACHINE_FUNCTION_PASS("funclet-layout", FuncletLayoutPass)
DUMMY_MACHINE_FUNCTION_PASS("instruction-select", InstructionSelectPass)
DUMMY_MACHINE_FUNCTION_PASS("lrshrink", LiveRangeShrinkPass)
-DUMMY_MACHINE_FUNCTION_PASS("machine-combiner", MachineCombinerPass)
DUMMY_MACHINE_FUNCTION_PASS("machine-function-splitter", MachineFunctionSplitterPass)
DUMMY_MACHINE_FUNCTION_PASS("machineinstr-printer", MachineFunctionPrinterPass)
DUMMY_MACHINE_FUNCTION_PASS("mirfs-discriminators", MIRAddFSDiscriminatorsPass)
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index 1c2f17996ad58..161ccf3b92b4b 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -88,7 +88,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeMachineBranchProbabilityInfoWrapperPassPass(Registry);
initializeMachineCFGPrinterLegacyPass(Registry);
initializeMachineCSELegacyPass(Registry);
- initializeMachineCombinerPass(Registry);
+ initializeMachineCombinerLegacyPass(Registry);
initializeMachineDominanceFrontierWrapperPassPass(Registry);
initializeMachineCopyPropagationLegacyPass(Registry);
initializeMachineCycleInfoPrinterLegacyPass(Registry);
diff --git a/llvm/lib/CodeGen/MachineCombiner.cpp b/llvm/lib/CodeGen/MachineCombiner.cpp
index a8b76e6c93346..95b91099e86a9 100644
--- a/llvm/lib/CodeGen/MachineCombiner.cpp
+++ b/llvm/lib/CodeGen/MachineCombiner.cpp
@@ -10,13 +10,16 @@
// instructions do not lengthen the critical path or the resource depth.
//===----------------------------------------------------------------------===//
+#include "llvm/CodeGen/MachineCombiner.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Analysis/ProfileSummaryInfo.h"
#include "llvm/CodeGen/LazyMachineBlockFrequencyInfo.h"
+#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
#include "llvm/CodeGen/MachineCombinerPattern.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionAnalysis.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -38,10 +41,11 @@ using namespace llvm;
STATISTIC(NumInstCombined, "Number of machineinst combined");
-static cl::opt<unsigned>
-inc_threshold("machine-combiner-inc-threshold", cl::Hidden,
- cl::desc("Incremental depth computation will be used for basic "
- "blocks with more instructions."), cl::init(500));
+static cl::opt<unsigned> inc_threshold(
+ "machine-combiner-inc-threshold", cl::Hidden,
+ cl::desc("Incremental depth computation will be used for basic "
+ "blocks with more instructions."),
+ cl::init(500));
static cl::opt<bool> dump_intrs("machine-combiner-dump-subst-intrs", cl::Hidden,
cl::desc("Dump all substituted intrs"),
@@ -62,7 +66,7 @@ static cl::opt<bool> VerifyPatternOrder(
#endif
namespace {
-class MachineCombiner : public MachineFunctionPass {
+class MachineCombinerImpl {
const TargetSubtargetInfo *STI = nullptr;
const TargetInstrInfo *TII = nullptr;
const TargetRegisterInfo *TRI = nullptr;
@@ -78,11 +82,10 @@ class MachineCombiner : public MachineFunctionPass {
TargetSchedModel TSchedModel;
public:
- static char ID;
- MachineCombiner() : MachineFunctionPass(ID) {}
- void getAnalysisUsage(AnalysisUsage &AU) const override;
- bool runOnMachineFunction(MachineFunction &MF) override;
- StringRef getPassName() const override { return "Machine InstCombiner"; }
+ MachineCombinerImpl() = default;
+ bool run(MachineFunction &MF, MachineLoopInfo *MLI,
+ MachineTraceMetrics *Traces, ProfileSummaryInfo *PSI,
+ MachineBlockFrequencyInfo *MBFI, RegisterClassInfo *RegClassInfo);
private:
bool combineInstructions(MachineBasicBlock *);
@@ -118,20 +121,29 @@ class MachineCombiner : public MachineFunctionPass {
CombinerObjective getCombinerObjective(unsigned Pattern);
};
-}
-char MachineCombiner::ID = 0;
-char &llvm::MachineCombinerID = MachineCombiner::ID;
+class MachineCombinerLegacy : public MachineFunctionPass {
+public:
+ static char ID;
+ MachineCombinerLegacy() : MachineFunctionPass(ID) {}
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ bool runOnMachineFunction(MachineFunction &MF) override;
+ StringRef getPassName() const override { return "Machine InstCombiner"; }
+};
+} // namespace
-INITIALIZE_PASS_BEGIN(MachineCombiner, DEBUG_TYPE,
- "Machine InstCombiner", false, false)
+char MachineCombinerLegacy::ID = 0;
+char &llvm::MachineCombinerID = MachineCombinerLegacy::ID;
+
+INITIALIZE_PASS_BEGIN(MachineCombinerLegacy, DEBUG_TYPE, "Machine InstCombiner",
+ false, false)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineRegisterClassInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineTraceMetricsWrapperPass)
-INITIALIZE_PASS_END(MachineCombiner, DEBUG_TYPE, "Machine InstCombiner",
+INITIALIZE_PASS_END(MachineCombinerLegacy, DEBUG_TYPE, "Machine InstCombiner",
false, false)
-void MachineCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
+void MachineCombinerLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
AU.addRequired<MachineLoopInfoWrapperPass>();
AU.addRequired<MachineRegisterClassInfoWrapperPass>();
@@ -142,8 +154,7 @@ void MachineCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
MachineFunctionPass::getAnalysisUsage(AU);
}
-MachineInstr *
-MachineCombiner::getOperandDef(const MachineOperand &MO) {
+MachineInstr *MachineCombinerImpl::getOperandDef(const MachineOperand &MO) {
MachineInstr *DefInstr = nullptr;
// We need a virtual register definition.
if (MO.isReg() && MO.getReg().isVirtual())
@@ -152,7 +163,7 @@ MachineCombiner::getOperandDef(const MachineOperand &MO) {
}
/// Return true if MI is unlikely to generate an actual target instruction.
-bool MachineCombiner::isTransientMI(const MachineInstr *MI) {
+bool MachineCombinerImpl::isTransientMI(const MachineInstr *MI) {
if (!MI->isCopy())
return MI->isTransient();
@@ -197,10 +208,10 @@ bool MachineCombiner::isTransientMI(const MachineInstr *MI) {
///
/// \returns Depth of last instruction in \InsInstrs ("NewRoot")
unsigned
-MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
- DenseMap<Register, unsigned> &InstrIdxForVirtReg,
- MachineTraceMetrics::Trace BlockTrace,
- const MachineBasicBlock &MBB) {
+MachineCombinerImpl::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
+ DenseMap<Register, unsigned> &InstrIdxForVirtReg,
+ MachineTraceMetrics::Trace BlockTrace,
+ const MachineBasicBlock &MBB) {
SmallVector<unsigned, 16> InstrDepth;
// For each instruction in the new sequence compute the depth based on the
// operands. Use the trace information when possible. For new operands which
@@ -260,8 +271,9 @@ MachineCombiner::getDepth(SmallVectorImpl<MachineInstr *> &InsInstrs,
/// \param BlockTrace is a trace of machine instructions
///
/// \returns Latency of \p NewRoot
-unsigned MachineCombiner::getLatency(MachineInstr *Root, MachineInstr *NewRoot,
- MachineTraceMetrics::Trace BlockTrace) {
+unsigned
+MachineCombinerImpl::getLatency(MachineInstr *Root, MachineInstr *NewRoot,
+ MachineTraceMetrics::Trace BlockTrace) {
// Check each definition in NewRoot and compute the latency
unsigned NewRootLatency = 0;
@@ -290,7 +302,7 @@ unsigned MachineCombiner::getLatency(MachineInstr *Root, MachineInstr *NewRoot,
return NewRootLatency;
}
-CombinerObjective MachineCombiner::getCombinerObjective(unsigned Pattern) {
+CombinerObjective MachineCombinerImpl::getCombinerObjective(unsigned Pattern) {
// TODO: If C++ ever gets a real enum class, make this part of the
// MachineCombinerPattern class.
switch (Pattern) {
@@ -308,7 +320,8 @@ CombinerObjective MachineCombiner::getCombinerObjective(unsigned Pattern) {
/// up the latencies of the inserted and deleted instructions. This assumes
/// that the inserted and deleted instructions are dependent instruction chains,
/// which might not hold in all cases.
-std::pair<unsigned, unsigned> MachineCombiner::getLatenciesForInstrSequences(
+std::pair<unsigned, unsigned>
+MachineCombinerImpl::getLatenciesForInstrSequences(
MachineInstr &MI, SmallVectorImpl<MachineInstr *> &InsInstrs,
SmallVectorImpl<MachineInstr *> &DelInstrs,
MachineTraceMetrics::Trace BlockTrace) {
@@ -327,7 +340,7 @@ std::pair<unsigned, unsigned> MachineCombiner::getLatenciesForInstrSequences(
return {NewRootLatency, RootLatency};
}
-bool MachineCombiner::reduceRegisterPressure(
+bool MachineCombinerImpl::reduceRegisterPressure(
MachineInstr &Root, MachineBasicBlock *MBB,
SmallVectorImpl<MachineInstr *> &InsInstrs,
SmallVectorImpl<MachineInstr *> &DelInstrs, unsigned Pattern) {
@@ -343,7 +356,7 @@ bool MachineCombiner::reduceRegisterPressure(
/// sequence to replace the old sequence is that it cannot lengthen the critical
/// path. The definition of "improve" may be restricted by specifying that the
/// new path improves the data dependency chain (MustReduceDepth).
-bool MachineCombiner::improvesCriticalPathLen(
+bool MachineCombinerImpl::improvesCriticalPathLen(
MachineBasicBlock *MBB, MachineInstr *Root,
MachineTraceMetrics::Trace BlockTrace,
SmallVectorImpl<MachineInstr *> &InsInstrs,
@@ -405,7 +418,7 @@ bool MachineCombiner::improvesCriticalPathLen(
}
/// helper routine to convert instructions into SC
-void MachineCombiner::instr2instrSC(
+void MachineCombinerImpl::instr2instrSC(
SmallVectorImpl<MachineInstr *> &Instrs,
SmallVectorImpl<const MCSchedClassDesc *> &InstrsSC) {
for (auto *InstrPtr : Instrs) {
@@ -417,7 +430,7 @@ void MachineCombiner::instr2instrSC(
}
/// True when the new instructions do not increase resource length
-bool MachineCombiner::preservesResourceLen(
+bool MachineCombinerImpl::preservesResourceLen(
MachineBasicBlock *MBB, MachineTraceMetrics::Trace BlockTrace,
SmallVectorImpl<MachineInstr *> &InsInstrs,
SmallVectorImpl<MachineInstr *> &DelInstrs) {
@@ -426,8 +439,8 @@ bool MachineCombiner::preservesResourceLen(
// Compute current resource length
- //ArrayRef<const MachineBasicBlock *> MBBarr(MBB);
- SmallVector <const MachineBasicBlock *, 1> MBBarr;
+ // ArrayRef<const MachineBasicBlock *> MBBarr(MBB);
+ SmallVector<const MachineBasicBlock *, 1> MBBarr;
MBBarr.push_back(MBB);
unsigned ResLenBeforeCombine = BlockTrace.getResourceLength(MBBarr);
@@ -450,7 +463,7 @@ bool MachineCombiner::preservesResourceLen(
<< " and after: " << ResLenAfterCombine << "\n");
LLVM_DEBUG(
ResLenAfterCombine <=
- ResLenBeforeCombine + TII->getExtendResourceLenLimit()
+ ResLenBeforeCombine + TII->getExtendResourceLenLimit()
? dbgs() << "\t\t As result it IMPROVES/PRESERVES Resource Length\n"
: dbgs() << "\t\t As result it DOES NOT improve/preserve Resource "
"Length\n");
@@ -518,7 +531,7 @@ insertDeleteInstructions(MachineBasicBlock *MBB, MachineInstr &MI,
/// instructions when this neither lengthens the critical path nor increases
/// resource pressure. When optimizing for codesize always combine when the new
/// sequence is shorter.
-bool MachineCombiner::combineInstructions(MachineBasicBlock *MBB) {
+bool MachineCombinerImpl::combineInstructions(MachineBasicBlock *MBB) {
bool Changed = false;
LLVM_DEBUG(dbgs() << "Combining MBB " << MBB->getName() << "\n");
@@ -590,12 +603,12 @@ bool MachineCombiner::combineInstructions(MachineBasicBlock *MBB) {
dbgs() << "\tFor the Pattern (" << (int)P
<< ") these instructions could be removed\n";
for (auto const *InstrPtr : DelInstrs)
- InstrPtr->print(dbgs(), /*IsStandalone*/false, /*SkipOpers*/false,
- /*SkipDebugLoc*/false, /*AddNewLine*/true, TII);
+ InstrPtr->print(dbgs(), /*IsStandalone*/ false, /*SkipOpers*/ false,
+ /*SkipDebugLoc*/ false, /*AddNewLine*/ true, TII);
dbgs() << "\tThese instructions could replace the removed ones\n";
for (auto const *InstrPtr : InsInstrs)
- InstrPtr->print(dbgs(), /*IsStandalone*/false, /*SkipOpers*/false,
- /*SkipDebugLoc*/false, /*AddNewLine*/true, TII);
+ InstrPtr->print(dbgs(), /*IsStandalone*/ false, /*SkipOpers*/ false,
+ /*SkipDebugLoc*/ false, /*AddNewLine*/ true, TII);
});
// Check that the difference between original and new latency is
@@ -639,7 +652,8 @@ bool MachineCombiner::combineInstructions(MachineBasicBlock *MBB) {
}
if (ML && TII->isThroughputPattern(P)) {
- LLVM_DEBUG(dbgs() << "\t Replacing due to throughput pattern in loop\n");
+ LLVM_DEBUG(
+ dbgs() << "\t Replacing due to throughput pattern in loop\n");
insertDeleteInstructions(MBB, MI, InsInstrs, DelInstrs, TraceEnsemble,
RegUnits, TII, P, IncrementalUpdate);
// Eagerly stop after the first pattern fires.
@@ -647,8 +661,8 @@ bool MachineCombiner::combineInstructions(MachineBasicBlock *MBB) {
break;
} else if (OptForSize && InsInstrs.size() < DelInstrs.size()) {
LLVM_DEBUG(dbgs() << "\t Replacing due to OptForSize ("
- << InsInstrs.size() << " < "
- << DelInstrs.size() << ")\n");
+ << InsInstrs.size() << " < " << DelInstrs.size()
+ << ")\n");
insertDeleteInstructions(MBB, MI, InsInstrs, DelInstrs, TraceEnsemble,
RegUnits, TII, P, IncrementalUpdate);
// Eagerly stop after the first pattern fires.
@@ -694,23 +708,25 @@ bool MachineCombiner::combineInstructions(MachineBasicBlock *MBB) {
return Changed;
}
-bool MachineCombiner::runOnMachineFunction(MachineFunction &MF) {
+bool MachineCombinerImpl::run(MachineFunction &MF, MachineLoopInfo *MLI,
+ MachineTraceMetrics *Traces,
+ ProfileSummaryInfo *PSI,
+ MachineBlockFrequencyInfo *MBFI,
+ RegisterClassInfo *RegClassInfo) {
STI = &MF.getSubtarget();
TII = STI->getInstrInfo();
TRI = STI->getRegisterInfo();
SchedModel = STI->getSchedModel();
TSchedModel.init(STI);
MRI = &MF.getRegInfo();
- MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
- Traces = &getAnalysis<MachineTraceMetricsWrapperPass>().getMTM();
- PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
- MBFI = (PSI && PSI->hasProfileSummary()) ?
- &getAnalysis<LazyMachineBlockFrequencyInfoPass>().getBFI() :
- nullptr;
+ this->MLI = MLI;
+ this->Traces = Traces;
+ this->PSI = PSI;
+ this->MBFI = MBFI;
+ this->RegClassInfo = RegClassInfo;
TraceEnsemble = nullptr;
- RegClassInfo = &getAnalysis<MachineRegisterClassInfoWrapperPass>().getRCI();
- LLVM_DEBUG(dbgs() << getPassName() << ": " << MF.getName() << '\n');
+ LLVM_DEBUG(dbgs() << "Machine InstCombiner: " << MF.getName() << '\n');
if (!TII->useMachineCombiner()) {
LLVM_DEBUG(
dbgs()
@@ -726,3 +742,38 @@ bool MachineCombiner::runOnMachineFunction(MachineFunction &MF) {
return Changed;
}
+
+bool MachineCombinerLegacy::runOnMachineFunction(MachineFunction &MF) {
+ auto *MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
+ auto *Traces = &getAnalysis<MachineTraceMetricsWrapperPass>().getMTM();
+ auto *PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
+ auto *MBFI = (PSI && PSI->hasProfileSummary())
+ ? &getAnalysis<LazyMachineBlockFrequencyInfoPass>().getBFI()
+ : nullptr;
+ auto &RegClassInfo =
+ getAnalysis<MachineRegisterClassInfoWrapperPass>().getRCI();
+ return MachineCombinerImpl().run(MF, MLI, Traces, PSI, MBFI, &RegClassInfo);
+}
+
+PreservedAnalyses
+MachineCombinerPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ MFPropsModifier _(*this, MF);
+ auto &MLI = MFAM.getResult<MachineLoopAnalysis>(MF);
+ auto &Traces = MFAM.getResult<MachineTraceMetricsAnalysis>(MF);
+ auto *PSI = MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(MF)
+ .getCachedResult<ProfileSummaryAnalysis>(
+ *MF.getFunction().getParent());
+ auto *MBFI = (PSI && PSI->hasProfileSummary())
+ ? &MFAM.getResult<MachineBlockFrequencyAnalysis>(MF)
+ : nullptr;
+ auto &RegClassInfo = MFAM.getResult<MachineRegisterClassAnalysis>(MF);
+ if (!MachineCombinerImpl().run(MF, &MLI, &Traces, PSI, MBFI, &RegClassInfo))
+ return PreservedAnalyses::all();
+
+ auto PA = getMachineFunctionPassPreservedAnalyses();
+ PA.preserveSet<CFGAnalyses>();
+ PA.preserve<MachineLoopAnalysis>();
+ PA.preserve<MachineTraceMetricsAnalysis>();
+ return PA;
+}
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index f7bdc96361ddf..05a0d1c3e45c9 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -131,6 +131,7 @@
#include "llvm/CodeGen/MachineBlockPlacement.h"
#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
#include "llvm/CodeGen/MachineCFGPrinter.h"
+#include "llvm/CodeGen/MachineCombiner.h"
#include "llvm/CodeGen/MachineCSE.h"
#include "llvm/CodeGen/MachineCheckDebugify.h"
#include "llvm/CodeGen/MachineCopyPropagation.h"
diff --git a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
index fc2eb6134d1fd..5d44c2191cf61 100644
--- a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
@@ -126,8 +126,7 @@ void X86CodeGenPassBuilder::addPreLegalizeMachineIR(
void X86CodeGenPassBuilder::addILPOpts(PassManagerWrapper &PMW) const {
addMachineFunctionPass(EarlyIfConverterPass(), PMW);
if (X86EnableMachineCombinerPass) {
- // TODO(boomanaiden154): Add the MachineCombinerPass here once it has been
- // ported to the new pass manager.
+ addMachineFunctionPass(MachineCombinerPass(), PMW);
}
addMachineFunctionPass(X86CmovConversionPass(), PMW);
}
diff --git a/llvm/test/CodeGen/X86/llc-pipeline-npm.ll b/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
index 114d1e0c1b050..9b96d201d8676 100644
--- a/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+++ b/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
@@ -131,6 +131,7 @@
; O2-NEXT: localstackalloc
; O2-NEXT: dead-mi-elimination
; O2-NEXT: early-ifcvt
+; O2-NEXT: machine-combiner
; O2-NEXT: x86-cmov-conversion
; O2-NEXT: early-machinelicm
; O2-NEXT: machine-cse
@@ -331,6 +332,7 @@
; O3-WINDOWS-NEXT: localstackalloc
; O3-WINDOWS-NEXT: dead-mi-elimination
; O3-WINDOWS-NEXT: early-ifcvt
+; O3-WINDOWS-NEXT: machine-combiner
; O3-WINDOWS-NEXT: x86-cmov-conversion
; O3-WINDOWS-NEXT: early-machinelicm
; O3-WINDOWS-NEXT: machine-cse
diff --git a/llvm/test/CodeGen/X86/machine-combiner-dbg.mir b/llvm/test/CodeGen/X86/machine-combiner-dbg.mir
index 6817d7e0ef00a..a0be77b19410d 100644
--- a/llvm/test/CodeGen/X86/machine-combiner-dbg.mir
+++ b/llvm/test/CodeGen/X86/machine-combiner-dbg.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=x86_64-gnu-linux -run-pass=machine-combiner %s -o - | FileCheck %s
+# RUN: llc -mtriple=x86_64-gnu-linux -passes=machine-combiner %s -o - | FileCheck %s
--- |
define float @reassoc_me(float %f1, float %f2, float %f3, float %f4) !dbg !4 {
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