[llvm] [Mips] Fix getInstSizeInBytes for instructions with delay slots (PR #216665)

[via llvm-commits]

https://github.com/yingopq updated https://github.com/llvm/llvm-project/pull/216665

>From 411be5c56209657bf73057b77eaa9db31751f15c Mon Sep 17 00:00:00 2001
From: Ying Huang <ying.huang at oss.cipunited.com>
Date: Mon, 17 Aug 2026 16:59:04 +0800
Subject: [PATCH 1/2] [Mips] Fix getInstSizeInBytes for instructions with delay
 slots

MIPS branch/jump instructions (B, BEQ, JALR64Pseudo, PseudoReturn64,
etc.) have a delay slot. The actual encoded size is 8 bytes (instr + NOP).
This fixes "out of range PC16 fixup" errors on large functions.

This issue was exposed in llvm 23 by commit pr#191460 which changed
MipsBranchExpansion to use MBB::iterator instead of instr_iterator,
making the MBB size calculation more accurate and revealing the pre-existing bug.

Thanks for the pr#187703 `AllowOverEstimate` to help find instr which
actual size mismatch expected size .

Fix #112010.
---
 llvm/lib/Target/Mips/MipsInstrInfo.cpp | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
index 8648aa0836693..446d02ebfc4d8 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
@@ -708,6 +708,10 @@ bool MipsInstrInfo::isAsCheapAsAMove(const MachineInstr &MI) const {
 unsigned MipsInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
   switch (MI.getOpcode()) {
   default:
+    if (MI.hasDelaySlot()) {
+      // instr + 1 nop
+      return 8;
+    }
     return MI.getDesc().getSize();
   case  TargetOpcode::INLINEASM:
   case  TargetOpcode::INLINEASM_BR: {       // Inline Asm: Variable size.

>From 365e9c3177393e5863a083fbc5ac6595a6af05e4 Mon Sep 17 00:00:00 2001
From: Ying Huang <ying.huang at oss.cipunited.com>
Date: Tue, 18 Aug 2026 17:45:36 +0800
Subject: [PATCH 2/2] Use MI.getDesc().getSize() as base and add 4

---
 llvm/lib/Target/Mips/MipsInstrInfo.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
index 446d02ebfc4d8..3df62754e2140 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
@@ -710,7 +710,7 @@ unsigned MipsInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
   default:
     if (MI.hasDelaySlot()) {
       // instr + 1 nop
-      return 8;
+      return MI.getDesc().getSize() + 4;
     }
     return MI.getDesc().getSize();
   case  TargetOpcode::INLINEASM: