[llvm] [DAG] canCreateUndefOrPoison/isGuaranteedNotToBeUndefOrPoison - SCALAR_TO_VECTOR upper elements are poison (PR #217185)
Cyrus Ding via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 18 23:26:21 PDT 2026
https://github.com/dingcyrus updated https://github.com/llvm/llvm-project/pull/217185
>From 2fe0aac92ba2f6882dbabe57dd82eaaad5733038 Mon Sep 17 00:00:00 2001
From: Cyrus Ding <785101675 at qq.com>
Date: Wed, 19 Aug 2026 09:28:51 +0800
Subject: [PATCH] [DAG]
canCreateUndefOrPoison/isGuaranteedNotToBeUndefOrPoison - SCALAR_TO_VECTOR
upper elements are poison
ISD::SCALAR_TO_VECTOR documents its upper elements (1..N-1) as poison,
not undef. Update both helpers to use includesPoison(Kind) instead of
includesUndef(Kind) when those elements are demanded, so PoisonOnly
queries correctly report that the upper elements can create poison and
are not guaranteed to be poison-free.
Fixes #217028
---
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 8 ++++----
llvm/test/CodeGen/AArch64/neon-dotreduce.ll | 7 ++++---
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 00cef99069347..98daaacc3fba9 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5819,8 +5819,8 @@ bool SelectionDAG::isGuaranteedNotToBeUndefOrPoison(SDValue Op,
}
case ISD::SCALAR_TO_VECTOR:
- // Check upper (known undef) elements.
- if (DemandedElts.ugt(1) && includesUndef(Kind))
+ // Check upper (known poison) elements.
+ if (DemandedElts.ugt(1) && includesPoison(Kind))
return false;
// Check element zero.
if (DemandedElts[0] &&
@@ -6097,8 +6097,8 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
!isKnownNeverZero(Op.getOperand(0), Depth + 1);
case ISD::SCALAR_TO_VECTOR:
- // Check if we demand any upper (undef) elements.
- return includesUndef(Kind) && DemandedElts.ugt(1);
+ // Check if we demand any upper (poison) elements.
+ return includesPoison(Kind) && DemandedElts.ugt(1);
case ISD::INSERT_VECTOR_ELT:
case ISD::EXTRACT_VECTOR_ELT: {
diff --git a/llvm/test/CodeGen/AArch64/neon-dotreduce.ll b/llvm/test/CodeGen/AArch64/neon-dotreduce.ll
index f5312828cfd78..06d90d1e548f9 100644
--- a/llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+++ b/llvm/test/CodeGen/AArch64/neon-dotreduce.ll
@@ -4906,16 +4906,17 @@ entry:
define i32 @test_udot_v33i8_nomla(ptr nocapture readonly %a1) {
; CHECK-SD-LABEL: test_udot_v33i8_nomla:
; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: ldr b1, [x0, #32]
+; CHECK-SD-NEXT: ldrb w8, [x0, #32]
; CHECK-SD-NEXT: ldp q3, q2, [x0]
; CHECK-SD-NEXT: movi v0.2d, #0000000000000000
-; CHECK-SD-NEXT: ushll v1.8h, v1.8b, #0
+; CHECK-SD-NEXT: fmov s1, w8
; CHECK-SD-NEXT: ushll v4.8h, v2.8b, #0
; CHECK-SD-NEXT: ushll v5.8h, v3.8b, #0
; CHECK-SD-NEXT: ushll2 v2.8h, v2.16b, #0
; CHECK-SD-NEXT: ushll2 v3.8h, v3.16b, #0
-; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #0
+; CHECK-SD-NEXT: ushll v1.8h, v1.8b, #0
; CHECK-SD-NEXT: uaddl2 v6.4s, v5.8h, v4.8h
+; CHECK-SD-NEXT: ushll v1.4s, v1.4h, #0
; CHECK-SD-NEXT: mov v0.s[0], v1.s[0]
; CHECK-SD-NEXT: uaddl2 v1.4s, v3.8h, v2.8h
; CHECK-SD-NEXT: uaddl v2.4s, v3.4h, v2.4h
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