[llvm] [AMDGPU] Model 2-pass HWVALU blocking for 8-pass XDL MFMA (PR #184084)

[Anshil Gandhi via llvm-commits]

gandhi56 wrote:

> I revised this PR to model the 8-pass MFMA behaviour in SISchedule.td, to block the HWVALU resource for the first two passes. This way, the scheduler will be able to take the MFMA resource occupation into account.

ping

https://github.com/llvm/llvm-project/pull/184084