[llvm] [CodeGen] Use RegisterClassInfo for remaining allocation-order users (PR #216510)

[Matt Arsenault via llvm-commits]

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@@ -751,10 +752,21 @@ void RegAllocPBQP::finalizeAlloc(MachineFunction &MF, LiveIntervals &LIS,
     Register PReg = MRI.getSimpleHint(LI.reg());
 
     if (PReg == 0) {
-      ArrayRef<MCPhysReg> Order = RCI.getOrder(MRI.getRegClass(LI.reg()));
-      assert(!Order.empty() &&
-             "No un-reserved physical registers in this register class");
-      PReg = Order.front();
+      const TargetRegisterClass *RC = MRI.getRegClass(LI.reg());
+      ArrayRef<MCPhysReg> Order = RCI.getOrder(RC);
+      if (Order.empty()) {
+        bool EmitError = !MF.getProperties().hasFailedRegAlloc();
+        if (EmitError) {
+          MF.getProperties().setFailedRegAlloc();
+          MF.getFunction().getContext().diagnose(
+              DiagnosticInfoRegAllocFailure(
+                  "no registers from class available to allocate",
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arsenm wrote:

Yes, I would. It also might require even more work. I put a huge amount of effort into getting the other allocators into a state where they do not trigger verifier errors after failing the allocation 

https://github.com/llvm/llvm-project/pull/216510