[llvm] 0ef7e0c - [ARM] Allow tTAILJMPd on v8-M Baseline (#216747)
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Tue Aug 18 10:06:01 PDT 2026
Author: Guy David
Date: 2026-08-18T20:05:56+03:00
New Revision: 0ef7e0c4076e8a8d590b82bdd0fa6904d20ab2fb
URL: https://github.com/llvm/llvm-project/commit/0ef7e0c4076e8a8d590b82bdd0fa6904d20ab2fb
DIFF: https://github.com/llvm/llvm-project/commit/0ef7e0c4076e8a8d590b82bdd0fa6904d20ab2fb.diff
LOG: [ARM] Allow tTAILJMPd on v8-M Baseline (#216747)
a1189106d5a1 added B.W to v8-M Baseline, relaxing t2B, tCBZ and tCBNZ
from Requires<[IsThumb2]> to Requires<[IsThumb, HasV8MBaseline]>, and
enabled tail calls for it. It missed tTAILJMPd, which expands to t2B but
still required IsThumb2, so emitting a tail call for a Thumb1 MachO
target failed:
> LLVM ERROR: Attempting to emit tTAILJMPd instruction but the
Feature_IsThumb2 predicate(s) are not met
Added:
llvm/test/CodeGen/ARM/v8m-tail-call-macho.ll
Modified:
llvm/lib/Target/ARM/ARMInstrThumb.td
llvm/lib/Target/ARM/ARMInstrThumb2.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td
index c87bdb030f0f1..de9d41c116a37 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -657,8 +657,8 @@ let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in {
(tBX GPR:$dst, (ops 14, zero_reg))>,
Requires<[IsThumb]>, Sched<[WriteBr]>;
}
- // tTAILJMPd: MachO version uses a Thumb2 branch (no Thumb1 tail calls
- // on MachO), so it's in ARMInstrThumb2.td.
+ // tTAILJMPd: MachO version uses a wide branch, so it's in
+ // ARMInstrThumb2.td.
// Non-MachO version:
let Uses = [SP] in {
def tTAILJMPdND : tPseudoExpand<(outs),
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td
index 3ce2c3eb5a95b..55f9bbfb717e6 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -4083,7 +4083,7 @@ let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in {
(ins thumb_br_target:$dst, pred:$p),
4, IIC_Br, [],
(t2B thumb_br_target:$dst, pred:$p)>,
- Requires<[IsThumb2]>, Sched<[WriteBr]>;
+ Requires<[IsThumb, HasV8MBaseline]>, Sched<[WriteBr]>;
}
// IT block
diff --git a/llvm/test/CodeGen/ARM/v8m-tail-call-macho.ll b/llvm/test/CodeGen/ARM/v8m-tail-call-macho.ll
new file mode 100644
index 0000000000000..d50991de80bac
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/v8m-tail-call-macho.ll
@@ -0,0 +1,17 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc %s -o - -mtriple=thumbv7em-apple-none-macho -float-abi=soft | FileCheck %s --check-prefix=THUMB2
+; RUN: llc %s -o - -mtriple=thumbv7em-apple-none-macho -float-abi=soft -mcpu=cortex-m23 | FileCheck %s --check-prefix=V8M-BASE
+
+declare void @callee()
+
+define void @tail_call() {
+; THUMB2-LABEL: tail_call:
+; THUMB2: @ %bb.0:
+; THUMB2-NEXT: b.w _callee
+;
+; V8M-BASE-LABEL: tail_call:
+; V8M-BASE: @ %bb.0:
+; V8M-BASE-NEXT: b.w _callee
+ tail call void @callee()
+ ret void
+}
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