[llvm] [SLP] Support vectorizing ptrtoaddr (PR #216902)
Thurston Dang via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 18 09:51:19 PDT 2026
https://github.com/thurstond updated https://github.com/llvm/llvm-project/pull/216902
>From 243c8b5f468e36ad7671ddcd4a4feb0b6d45ee35 Mon Sep 17 00:00:00 2001
From: Thurston Dang <thurston at google.com>
Date: Tue, 18 Aug 2026 02:31:38 +0000
Subject: [PATCH] [SLP] Support vectorizing ptrtoaddr
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ptrtoaddr ptrtoint’s younger cousin. ptrtoaddr “is different from ptrtoint in that it only operates on the index bits of the pointer and ignores all other bits, and does not capture the provenance of the pointer" (https://llvm.org/docs/LangRef.html#i-ptrtoaddr), which is immaterial to its vectorizability.
Currently, SLP Vectorizer handles ptrtoint but not ptrtoaddr (as observed in an ASan test: https://github.com/llvm/llvm-project/pull/216827#issuecomment-5322231318). This patch handles ptrtoaddr in a similar way to ptrtoint.
---
.../Transforms/Vectorize/SLPVectorizer.cpp | 6 +++++
.../SLPVectorizer/X86/opaque-ptr.ll | 26 +++++++++++++++++++
2 files changed, 32 insertions(+)
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index d007e10eb30d4..fd137338a7b9d 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -7802,6 +7802,7 @@ bool BoUpSLP::isProfitableToReorder() const {
getRootNode().getOpcode() == Instruction::PHI ||
(getRootNode().getVectorFactor() <= TinyVF &&
(getRootNode().getOpcode() == Instruction::PtrToInt ||
+ getRootNode().getOpcode() == Instruction::PtrToAddr ||
getRootNode().getOpcode() == Instruction::ICmp))) &&
getRootNode().ReorderIndices.empty()) {
// Check if the tree has only single store and single (unordered) load node,
@@ -10316,6 +10317,7 @@ BoUpSLP::TreeEntry::EntryState BoUpSLP::getScalarsVectorizationState(
case Instruction::FPToSI:
case Instruction::FPExt:
case Instruction::PtrToInt:
+ case Instruction::PtrToAddr:
case Instruction::IntToPtr:
case Instruction::SIToFP:
case Instruction::UIToFP:
@@ -11378,6 +11380,7 @@ class InstructionsCompatibilityAnalysis {
case Instruction::FPToSI:
case Instruction::FPExt:
case Instruction::PtrToInt:
+ case Instruction::PtrToAddr:
case Instruction::IntToPtr:
case Instruction::SIToFP:
case Instruction::UIToFP:
@@ -13090,6 +13093,7 @@ void BoUpSLP::buildTreeRec(ArrayRef<Value *> VLRef, unsigned Depth,
case Instruction::FPToSI:
case Instruction::FPExt:
case Instruction::PtrToInt:
+ case Instruction::PtrToAddr:
case Instruction::IntToPtr:
case Instruction::SIToFP:
case Instruction::UIToFP:
@@ -17191,6 +17195,7 @@ BoUpSLP::getEntryCost(const TreeEntry *E, ArrayRef<Value *> VectorizedVals,
case Instruction::FPToSI:
case Instruction::FPExt:
case Instruction::PtrToInt:
+ case Instruction::PtrToAddr:
case Instruction::IntToPtr:
case Instruction::SIToFP:
case Instruction::UIToFP:
@@ -23683,6 +23688,7 @@ Value *BoUpSLP::vectorizeTree(TreeEntry *E) {
case Instruction::FPToSI:
case Instruction::FPExt:
case Instruction::PtrToInt:
+ case Instruction::PtrToAddr:
case Instruction::IntToPtr:
case Instruction::SIToFP:
case Instruction::UIToFP:
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/opaque-ptr.ll b/llvm/test/Transforms/SLPVectorizer/X86/opaque-ptr.ll
index 4348b411616f0..c734ed0bd1480 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/opaque-ptr.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/opaque-ptr.ll
@@ -75,3 +75,29 @@ define void @test2(ptr %a, ptr %b) {
store i64 %add2, ptr %a2, align 8
ret void
}
+
+define void @test3(ptr %a, ptr %b) {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x ptr> poison, ptr [[A:%.*]], i64 0
+; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x ptr> [[TMP1]], ptr [[B:%.*]], i64 1
+; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i64, <2 x ptr> [[TMP2]], <2 x i64> <i64 1, i64 3>
+; CHECK-NEXT: [[A1:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 1
+; CHECK-NEXT: [[TMP4:%.*]] = ptrtoaddr <2 x ptr> [[TMP3]] to <2 x i64>
+; CHECK-NEXT: [[TMP5:%.*]] = load <2 x i64>, ptr [[A1]], align 8
+; CHECK-NEXT: [[TMP6:%.*]] = add <2 x i64> [[TMP4]], [[TMP5]]
+; CHECK-NEXT: store <2 x i64> [[TMP6]], ptr [[A1]], align 8
+; CHECK-NEXT: ret void
+;
+ %a1 = getelementptr inbounds i64, ptr %a, i64 1
+ %a2 = getelementptr inbounds i64, ptr %a, i64 2
+ %i1 = ptrtoaddr ptr %a1 to i64
+ %b3 = getelementptr inbounds i64, ptr %b, i64 3
+ %i2 = ptrtoaddr ptr %b3 to i64
+ %v1 = load i64, ptr %a1, align 8
+ %v2 = load i64, ptr %a2, align 8
+ %add1 = add i64 %i1, %v1
+ %add2 = add i64 %i2, %v2
+ store i64 %add1, ptr %a1, align 8
+ store i64 %add2, ptr %a2, align 8
+ ret void
+}
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