[llvm] [X86] Prefer VPMOVMSKB for nonnegative byte comparison masks (PR #216884)

Oscar Priego via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 17 22:03:42 PDT 2026


================
@@ -46518,14 +46518,22 @@ static SDValue combineBitcastvxi1(SelectionDAG &DAG, EVT VT, SDValue Src,
                        Src.getOperand(0).getValueType() == MVT::v32i8 ||
                        Src.getOperand(0).getValueType() == MVT::v64i8);
 
-  // Prefer movmsk for AVX512 for (bitcast (setlt X, 0)) which can be handled
-  // directly with vpmovmskb/vmovmskps/vmovmskpd.
-  if (Src.getOpcode() == ISD::SETCC && Src.hasOneUse() &&
-      cast<CondCodeSDNode>(Src.getOperand(2))->get() == ISD::SETLT &&
-      ISD::isBuildVectorAllZeros(Src.getOperand(1).getNode())) {
+  // Prefer movmsk for AVX512 for bitcasts of signed sign-bit tests, which can
+  // be handled directly with vpmovmskb/vmovmskps/vmovmskpd.
+  if (Src.getOpcode() == ISD::SETCC && Src.hasOneUse()) {
+    ISD::CondCode CC = cast<CondCodeSDNode>(Src.getOperand(2))->get();
     EVT CmpVT = Src.getOperand(0).getValueType();
     EVT EltVT = CmpVT.getVectorElementType();
-    if (CmpVT.getSizeInBits() <= 256 &&
+    SDNode *RHS = Src.getOperand(1).getNode();
+    bool IsNegativeTest =
+        CC == ISD::SETLT && ISD::isBuildVectorAllZeros(RHS);
----------------
Opriego wrote:

Done, cached isBuildVectorAllZeros(RHS) in IsZero and reused it.

https://github.com/llvm/llvm-project/pull/216884


More information about the llvm-commits mailing list