[llvm] MachinePipeliner: Fix using getUniqueVRegDef on a physical register (PR #216793)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 17 10:55:32 PDT 2026
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/216793
Currently this is permissive and doesn't assert when called with
a physical register, but I'm working on changing this edge case.
No current observable change.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
>From 8e5e9e38d8ba1016cb091a208961e5b15be337c0 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Mon, 17 Aug 2026 19:46:44 +0200
Subject: [PATCH] MachinePipeliner: Fix using getUniqueVRegDef on a physical
register
Currently this is permissive and doesn't assert when called with
a physical register, but I'm working on changing this edge case.
No current observable change.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
---
llvm/lib/CodeGen/MachinePipeliner.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp
index cbe1c3a9d2cc2..cbac40f04fd19 100644
--- a/llvm/lib/CodeGen/MachinePipeliner.cpp
+++ b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -1323,6 +1323,8 @@ void SwingSchedulerDAG::updatePhiDependences() {
}
} else if (MO.isUse()) {
// If the register is defined by a Phi, then create a true dependence.
+ if (!Reg.isVirtual())
+ continue;
MachineInstr *DefMI = MRI.getUniqueVRegDef(Reg);
if (DefMI == nullptr)
continue;
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