[llvm] [RISCV] Optimize bitcast to use dedicated fneg instruction (PR #216659)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 17 10:20:51 PDT 2026


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@@ -48,9 +48,9 @@ define double @fneg(double %a) nounwind {
 ;
 ; RV64IFD-LABEL: fneg:
 ; RV64IFD:       # %bb.0:
-; RV64IFD-NEXT:    li a1, -1
-; RV64IFD-NEXT:    slli a1, a1, 63
-; RV64IFD-NEXT:    xor a0, a0, a1
+; RV64IFD-NEXT:    fmv.d.x fa5, a0
+; RV64IFD-NEXT:    fneg.d fa5, fa5
----------------
topperc wrote:

This doesn't look like an improvement.

https://github.com/llvm/llvm-project/pull/216659


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