[llvm] [VPlan] Replace gather with scalar load + splat for uniform addresses (PR #216767)
Shih-Po Hung via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 17 09:35:18 PDT 2026
https://github.com/arcbbb created https://github.com/llvm/llvm-project/pull/216767
When a widened load's address is uniform across VFs/UFs (i.e., loop-invariant)
and provably safe to access unconditionally, replace the masked/predicated gather
with a single scalar load followed by a splat.
>From b0531b5bb1213de4fd82d2cffdfba1a99a5a9809 Mon Sep 17 00:00:00 2001
From: ShihPo Hung <shihpo.hung at sifive.com>
Date: Mon, 17 Aug 2026 01:58:51 -0700
Subject: [PATCH 1/2] [VPlan] precommit uniform gather test
---
.../LoopVectorize/RISCV/uniform-gather.ll | 259 ++++++++++++++++++
1 file changed, 259 insertions(+)
create mode 100644 llvm/test/Transforms/LoopVectorize/RISCV/uniform-gather.ll
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/uniform-gather.ll b/llvm/test/Transforms/LoopVectorize/RISCV/uniform-gather.ll
new file mode 100644
index 0000000000000..17b73b3596ad8
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/uniform-gather.ll
@@ -0,0 +1,259 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
+; RUN: opt -S -passes=loop-vectorize -mtriple=riscv64 -mattr=+v %s 2>&1 | FileCheck %s
+
+ at log_table = internal constant [4 x i32] [i32 10, i32 20, i32 30, i32 40]
+ at exp_table = internal constant [4 x i32] [i32 1, i32 2, i32 3, i32 4]
+
+; Uniform, dereferenceable global variable.
+define void @global_table_load(ptr noalias %out, ptr noalias %cond, i64 %n) {
+; CHECK-LABEL: define void @global_table_load(
+; CHECK-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], i64 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[CURRENT_ITERATION_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ [[N]], %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
+; CHECK-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP2]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP1]])
+; CHECK-NEXT: [[TMP7:%.*]] = icmp ne <vscale x 4 x i32> [[VP_OP_LOAD]], zeroinitializer
+; CHECK-NEXT: [[TMP3:%.*]] = xor <vscale x 4 x i1> [[TMP7]], splat (i1 true)
+; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> align 4 shufflevector (<vscale x 4 x ptr> insertelement (<vscale x 4 x ptr> poison, ptr getelementptr inbounds nuw (i8, ptr @exp_table, i64 4), i64 0), <vscale x 4 x ptr> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i1> [[TMP3]], i32 [[TMP1]])
+; CHECK-NEXT: [[WIDE_MASKED_GATHER1:%.*]] = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> align 4 shufflevector (<vscale x 4 x ptr> insertelement (<vscale x 4 x ptr> poison, ptr getelementptr inbounds nuw (i8, ptr @log_table, i64 8), i64 0), <vscale x 4 x ptr> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i1> [[TMP7]], i32 [[TMP1]])
+; CHECK-NEXT: [[PREDPHI:%.*]] = select <vscale x 4 x i1> [[TMP7]], <vscale x 4 x i32> [[WIDE_MASKED_GATHER1]], <vscale x 4 x i32> [[WIDE_MASKED_GATHER]]
+; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX]]
+; CHECK-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[PREDPHI]], ptr align 4 [[TMP4]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP1]])
+; CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP1]] to i64
+; CHECK-NEXT: [[CURRENT_ITERATION_NEXT]] = add i64 [[TMP5]], [[INDEX]]
+; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP5]]
+; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
+; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[EXIT:.*]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.inc ]
+ %arrayidx.cond = getelementptr inbounds i32, ptr %cond, i64 %iv
+ %c = load i32, ptr %arrayidx.cond, align 4
+ %cmp = icmp ne i32 %c, 0
+ br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+ %gep.log = getelementptr inbounds [4 x i32], ptr @log_table, i64 0, i64 2
+ %v.then = load i32, ptr %gep.log, align 4
+ br label %if.end
+
+if.else:
+ %gep.exp = getelementptr inbounds [4 x i32], ptr @exp_table, i64 0, i64 1
+ %v.else = load i32, ptr %gep.exp, align 4
+ br label %if.end
+
+if.end:
+ %v = phi i32 [ %v.then, %if.then ], [ %v.else, %if.else ]
+ %arrayidx.out = getelementptr inbounds i32, ptr %out, i64 %iv
+ store i32 %v, ptr %arrayidx.out, align 4
+ br label %for.inc
+
+for.inc:
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, %n
+ br i1 %exitcond, label %exit, label %for.body
+
+exit:
+ ret void
+}
+
+; Uniform, dereferenceable(16) pointer parameter.
+; The access (bytes [12,16)) is inside the range.
+define void @deref_param_in_range(ptr noalias %out, ptr noalias %cond, ptr noalias nonnull align 4 dereferenceable(16) %table) nofree {
+; CHECK-LABEL: define void @deref_param_in_range(
+; CHECK-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], ptr noalias nonnull align 4 dereferenceable(16) [[TABLE:%.*]]) #[[ATTR1:[0-9]+]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[TABLE]], i64 3
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x ptr> poison, ptr [[TMP1]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 4 x ptr> [[BROADCAST_SPLATINSERT]], <vscale x 4 x ptr> poison, <vscale x 4 x i32> zeroinitializer
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[CURRENT_ITERATION_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 16, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)
+; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
+; CHECK-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP2]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP4]])
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <vscale x 4 x i32> [[VP_OP_LOAD]], zeroinitializer
+; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> align 4 [[BROADCAST_SPLAT]], <vscale x 4 x i1> [[TMP3]], i32 [[TMP4]])
+; CHECK-NEXT: [[PREDPHI:%.*]] = select <vscale x 4 x i1> [[TMP3]], <vscale x 4 x i32> [[WIDE_MASKED_GATHER]], <vscale x 4 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX]]
+; CHECK-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[PREDPHI]], ptr align 4 [[TMP6]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP4]])
+; CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP4]] to i64
+; CHECK-NEXT: [[CURRENT_ITERATION_NEXT]] = add nuw i64 [[TMP5]], [[INDEX]]
+; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP5]]
+; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
+; CHECK-NEXT: br i1 [[TMP7]], label %[[EXIT:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: br label %[[EXIT1:.*]]
+; CHECK: [[EXIT1]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.inc ]
+ %arrayidx.cond = getelementptr inbounds i32, ptr %cond, i64 %iv
+ %c = load i32, ptr %arrayidx.cond, align 4
+ %cmp = icmp ne i32 %c, 0
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ %gep.table = getelementptr inbounds i32, ptr %table, i64 3
+ %v.then = load i32, ptr %gep.table, align 4
+ br label %if.end
+
+if.end:
+ %v = phi i32 [ %v.then, %if.then ], [ 0, %for.body ]
+ %arrayidx.out = getelementptr inbounds i32, ptr %out, i64 %iv
+ store i32 %v, ptr %arrayidx.out, align 4
+ br label %for.inc
+
+for.inc:
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 16
+ br i1 %exitcond, label %exit, label %for.body
+
+exit:
+ ret void
+}
+
+; Uniform, dereferenceable(15) pointer parameter.
+; The last byte of the accessed i32 falls outside the range.
+define void @deref_param_out_of_range_last_byte(ptr noalias %out, ptr noalias %cond, ptr noalias nonnull align 4 dereferenceable(15) %table) nofree {
+; CHECK-LABEL: define void @deref_param_out_of_range_last_byte(
+; CHECK-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], ptr noalias nonnull align 4 dereferenceable(15) [[TABLE:%.*]]) #[[ATTR1]] {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[FOR_BODY:.*]]
+; CHECK: [[FOR_BODY]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[FOR_INC:.*]] ]
+; CHECK-NEXT: [[ARRAYIDX_COND:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[IV]]
+; CHECK-NEXT: [[C:%.*]] = load i32, ptr [[ARRAYIDX_COND]], align 4
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[C]], 0
+; CHECK-NEXT: br i1 [[CMP]], label %[[IF_THEN:.*]], label %[[IF_END:.*]]
+; CHECK: [[IF_THEN]]:
+; CHECK-NEXT: [[GEP_TABLE:%.*]] = getelementptr inbounds i32, ptr [[TABLE]], i64 3
+; CHECK-NEXT: [[V_THEN:%.*]] = load i32, ptr [[GEP_TABLE]], align 4
+; CHECK-NEXT: br label %[[IF_END]]
+; CHECK: [[IF_END]]:
+; CHECK-NEXT: [[V:%.*]] = phi i32 [ [[V_THEN]], %[[IF_THEN]] ], [ 0, %[[FOR_BODY]] ]
+; CHECK-NEXT: [[ARRAYIDX_OUT:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[IV]]
+; CHECK-NEXT: store i32 [[V]], ptr [[ARRAYIDX_OUT]], align 4
+; CHECK-NEXT: br label %[[FOR_INC]]
+; CHECK: [[FOR_INC]]:
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[IV_NEXT]], 4
+; CHECK-NEXT: br i1 [[EXITCOND]], label %[[EXIT:.*]], label %[[FOR_BODY]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.inc ]
+ %arrayidx.cond = getelementptr inbounds i32, ptr %cond, i64 %iv
+ %c = load i32, ptr %arrayidx.cond, align 4
+ %cmp = icmp ne i32 %c, 0
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ %gep.table = getelementptr inbounds i32, ptr %table, i64 3
+ %v.then = load i32, ptr %gep.table, align 4
+ br label %if.end
+
+if.end:
+ %v = phi i32 [ %v.then, %if.then ], [ 0, %for.body ]
+ %arrayidx.out = getelementptr inbounds i32, ptr %out, i64 %iv
+ store i32 %v, ptr %arrayidx.out, align 4
+ br label %for.inc
+
+for.inc:
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 4
+ br i1 %exitcond, label %exit, label %for.body
+
+exit:
+ ret void
+}
+
+define void @deref_param_in_range_nonconst(ptr noalias %out, ptr noalias %cond, ptr noalias nonnull align 4 dereferenceable(16) %table) {
+; CHECK-LABEL: define void @deref_param_in_range_nonconst(
+; CHECK-SAME: ptr noalias [[OUT:%.*]], ptr noalias [[COND:%.*]], ptr noalias nonnull align 4 dereferenceable(16) [[TABLE:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
+; CHECK: [[VECTOR_PH]]:
+; CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 4 x i64> @llvm.stepvector.nxv4i64()
+; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
+; CHECK: [[VECTOR_BODY]]:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[CURRENT_ITERATION_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 4 x i64> [ [[TMP0]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 16, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 4, i1 true)
+; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[TMP2]], i64 0
+; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 4 x i64> [[BROADCAST_SPLATINSERT]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
+; CHECK-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP3]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP1]])
+; CHECK-NEXT: [[TMP4:%.*]] = icmp ne <vscale x 4 x i32> [[VP_OP_LOAD]], zeroinitializer
+; CHECK-NEXT: [[TMP5:%.*]] = lshr <vscale x 4 x i64> [[VEC_IND]], splat (i64 10)
+; CHECK-NEXT: [[WIDE_GEP:%.*]] = getelementptr inbounds i32, ptr [[TABLE]], <vscale x 4 x i64> [[TMP5]]
+; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> align 4 [[WIDE_GEP]], <vscale x 4 x i1> [[TMP4]], i32 [[TMP1]])
+; CHECK-NEXT: [[PREDPHI:%.*]] = select <vscale x 4 x i1> [[TMP4]], <vscale x 4 x i32> [[WIDE_MASKED_GATHER]], <vscale x 4 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX]]
+; CHECK-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[PREDPHI]], ptr align 4 [[TMP6]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP1]])
+; CHECK-NEXT: [[CURRENT_ITERATION_NEXT]] = add nuw i64 [[TMP2]], [[INDEX]]
+; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP2]]
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <vscale x 4 x i64> [[VEC_IND]], [[BROADCAST_SPLAT]]
+; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
+; CHECK-NEXT: br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
+; CHECK: [[MIDDLE_BLOCK]]:
+; CHECK-NEXT: br label %[[EXIT:.*]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.inc ]
+ %arrayidx.cond = getelementptr inbounds i32, ptr %cond, i64 %iv
+ %c = load i32, ptr %arrayidx.cond, align 4
+ %cmp = icmp ne i32 %c, 0
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ %offset = udiv i64 %iv, 1024
+ %gep.table = getelementptr inbounds i32, ptr %table, i64 %offset
+ %v.then = load i32, ptr %gep.table, align 4
+ br label %if.end
+
+if.end:
+ %v = phi i32 [ %v.then, %if.then ], [ 0, %for.body ]
+ %arrayidx.out = getelementptr inbounds i32, ptr %out, i64 %iv
+ store i32 %v, ptr %arrayidx.out, align 4
+ br label %for.inc
+
+for.inc:
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 16
+ br i1 %exitcond, label %exit, label %for.body
+
+exit:
+ ret void
+}
>From 4bc45b3756873e5a9599fa3660253749081ecd97 Mon Sep 17 00:00:00 2001
From: ShihPo Hung <shihpo.hung at sifive.com>
Date: Mon, 17 Aug 2026 09:27:32 -0700
Subject: [PATCH 2/2] [VPlan] Replace gather with scalar load + splat for
uniform addresses
When a widened load's address is uniform across VFs/UFs (i.e., loop-
invariant) and provably safe to access unconditionally, replace the
masked/predicated gather with a single scalar load followed by a splat.
---
.../Transforms/Vectorize/VPlanTransforms.cpp | 24 +++++++++++++++++++
.../LoopVectorize/RISCV/uniform-gather.ll | 15 +++++++-----
2 files changed, 33 insertions(+), 6 deletions(-)
diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
index e75e9cf4e9103..1109c38f95889 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
@@ -5480,6 +5480,30 @@ void VPlanTransforms::makeMemOpWideningDecisions(VPlan &Plan, VFRange &Range,
return ReplaceWith(VPI, StoreR);
});
+ VPlanTransforms::runPass(
+ "skipUniformGather", ProcessSubset, Plan, [&](VPInstruction *VPI) {
+ if (VPI->getOpcode() != Instruction::Load)
+ return false;
+ VPValue *Addr = VPI->getOperand(0);
+ if (!vputils::isUniformAcrossVFsAndUFs(Addr))
+ return false;
+ auto &LI = cast<LoadInst>(*VPI->getUnderlyingInstr());
+ const DataLayout &DL =
+ Plan.getScalarHeader()->getIRBasicBlock()->getDataLayout();
+
+ Value *Underlying = Addr->getUnderlyingValue();
+ if (!Underlying)
+ return false;
+ if (!isSafeToLoadUnconditionally(
+ Underlying, LI.getType(), LI.getAlign(), DL, &LI,
+ /*AC=*/nullptr, /*DT=*/nullptr, &CostCtx.TLI))
+ return false;
+ auto *Recipe = VPBuilder::createSingleScalarOp(
+ VPI->getOpcode(), VPI->operandsWithoutMask(), /*Mask=*/nullptr,
+ *VPI, *VPI, VPI->getDebugLoc(), &LI);
+ Recipe->insertBefore(VPI);
+ return ReplaceWith(VPI, Recipe);
+ });
VPlanTransforms::runPass("delegateMemOpWideningToLegacyCM", ProcessSubset,
Plan, [&](VPInstruction *VPI) {
if (VPRecipeBase *Recipe =
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/uniform-gather.ll b/llvm/test/Transforms/LoopVectorize/RISCV/uniform-gather.ll
index 17b73b3596ad8..36be0c84cfce1 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/uniform-gather.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/uniform-gather.ll
@@ -19,9 +19,12 @@ define void @global_table_load(ptr noalias %out, ptr noalias %cond, i64 %n) {
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
; CHECK-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP2]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP1]])
; CHECK-NEXT: [[TMP7:%.*]] = icmp ne <vscale x 4 x i32> [[VP_OP_LOAD]], zeroinitializer
-; CHECK-NEXT: [[TMP3:%.*]] = xor <vscale x 4 x i1> [[TMP7]], splat (i1 true)
-; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> align 4 shufflevector (<vscale x 4 x ptr> insertelement (<vscale x 4 x ptr> poison, ptr getelementptr inbounds nuw (i8, ptr @exp_table, i64 4), i64 0), <vscale x 4 x ptr> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i1> [[TMP3]], i32 [[TMP1]])
-; CHECK-NEXT: [[WIDE_MASKED_GATHER1:%.*]] = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> align 4 shufflevector (<vscale x 4 x ptr> insertelement (<vscale x 4 x ptr> poison, ptr getelementptr inbounds nuw (i8, ptr @log_table, i64 8), i64 0), <vscale x 4 x ptr> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x i1> [[TMP7]], i32 [[TMP1]])
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @exp_table, i64 4), align 4
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[TMP3]], i64 0
+; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = shufflevector <vscale x 4 x i32> [[BROADCAST_SPLATINSERT1]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
+; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @log_table, i64 8), align 4
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[TMP8]], i64 0
+; CHECK-NEXT: [[WIDE_MASKED_GATHER1:%.*]] = shufflevector <vscale x 4 x i32> [[BROADCAST_SPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
; CHECK-NEXT: [[PREDPHI:%.*]] = select <vscale x 4 x i1> [[TMP7]], <vscale x 4 x i32> [[WIDE_MASKED_GATHER1]], <vscale x 4 x i32> [[WIDE_MASKED_GATHER]]
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX]]
; CHECK-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[PREDPHI]], ptr align 4 [[TMP4]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP1]])
@@ -79,8 +82,6 @@ define void @deref_param_in_range(ptr noalias %out, ptr noalias %cond, ptr noali
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, ptr [[TABLE]], i64 3
-; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x ptr> poison, ptr [[TMP1]], i64 0
-; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 4 x ptr> [[BROADCAST_SPLATINSERT]], <vscale x 4 x ptr> poison, <vscale x 4 x i32> zeroinitializer
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
; CHECK: [[VECTOR_BODY]]:
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[CURRENT_ITERATION_NEXT:%.*]], %[[VECTOR_BODY]] ]
@@ -89,7 +90,9 @@ define void @deref_param_in_range(ptr noalias %out, ptr noalias %cond, ptr noali
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr [[COND]], i64 [[INDEX]]
; CHECK-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x i32> @llvm.vp.load.nxv4i32.p0(ptr align 4 [[TMP2]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP4]])
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne <vscale x 4 x i32> [[VP_OP_LOAD]], zeroinitializer
-; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0(<vscale x 4 x ptr> align 4 [[BROADCAST_SPLAT]], <vscale x 4 x i1> [[TMP3]], i32 [[TMP4]])
+; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP1]], align 4
+; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 4 x i32> poison, i32 [[TMP8]], i64 0
+; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = shufflevector <vscale x 4 x i32> [[BROADCAST_SPLATINSERT]], <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
; CHECK-NEXT: [[PREDPHI:%.*]] = select <vscale x 4 x i1> [[TMP3]], <vscale x 4 x i32> [[WIDE_MASKED_GATHER]], <vscale x 4 x i32> zeroinitializer
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[OUT]], i64 [[INDEX]]
; CHECK-NEXT: call void @llvm.vp.store.nxv4i32.p0(<vscale x 4 x i32> [[PREDPHI]], ptr align 4 [[TMP6]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP4]])
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