[llvm] [LV] Rework collectUnitStridePredicates (PR #216362)

[Ramkumar Ramachandra via llvm-commits]

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@@ -3464,11 +3464,11 @@ define void @wrappingindvars1(i8 %t, i32 %len, ptr %A) {
 ; UNROLL:       vector.scevcheck:
 ; UNROLL-NEXT:    [[TMP1:%.*]] = trunc i32 [[LEN]] to i8
 ; UNROLL-NEXT:    [[TMP2:%.*]] = add i8 [[T]], [[TMP1]]
-; UNROLL-NEXT:    [[TMP3:%.*]] = icmp slt i8 [[TMP2]], [[T]]
+; UNROLL-NEXT:    [[TMP3:%.*]] = icmp ult i8 [[TMP2]], [[T]]
 ; UNROLL-NEXT:    [[TMP4:%.*]] = icmp ugt i32 [[LEN]], 255
 ; UNROLL-NEXT:    [[TMP5:%.*]] = or i1 [[TMP3]], [[TMP4]]
 ; UNROLL-NEXT:    [[TMP6:%.*]] = add i8 [[T]], [[TMP1]]
-; UNROLL-NEXT:    [[TMP7:%.*]] = icmp ult i8 [[TMP6]], [[T]]
+; UNROLL-NEXT:    [[TMP7:%.*]] = icmp slt i8 [[TMP6]], [[T]]
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artagnon wrote:

Hm, not sure, because we'd currently do:

tmp6 = add i8 0, 255
tmp7 = icmp slt i8 -1, 0 -> true

and still have the same true condition as before? I think the code is equivalent, as tmp2 = tmp6, and tmp3 and tmp7 and simply swapped, yielding the same overall result?

https://github.com/llvm/llvm-project/pull/216362