[llvm] [RISCV] Optimize bitcast to use dedicated fneg instruction (PR #216659)

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git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/include/llvm/CodeGen/TargetLowering.h llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/lib/Target/RISCV/RISCVISelLowering.h --diff_from_common_commit
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``````````diff
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index e58ebeb12..2571c1e84 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -3446,11 +3446,9 @@ public:
 
   /// Return true if the target should always perform FMA negation optimizations
   /// even when isFNegFree returns true. This is used to handle target-specific
-  /// cases where FMA negation should be performed regardless of the general 
-  /// fneg cost model. 
-  virtual bool shouldAlwaysPerformFMANegOpt(EVT VT) const {
-    return false;
-  }
+  /// cases where FMA negation should be performed regardless of the general
+  /// fneg cost model.
+  virtual bool shouldAlwaysPerformFMANegOpt(EVT VT) const { return false; }
 
   /// Return true if an fabs operation is free to the point where it is never
   /// worthwhile to replace it with a bitwise operation.
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index bb46c6f5f..6a0e9718a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -19934,7 +19934,8 @@ SDValue DAGCombiner::visitFMA(SDNode *N) {
 
   // fold ((fma (fneg X), Y, (fneg Z)) -> fneg (fma X, Y, Z))
   // fold ((fma X, (fneg Y), (fneg Z)) -> fneg (fma X, Y, Z))
-bool shouldPerformFMANegOpt = !TLI.isFNegFree(VT) || TLI.shouldAlwaysPerformFMANegOpt(VT);
+  bool shouldPerformFMANegOpt =
+      !TLI.isFNegFree(VT) || TLI.shouldAlwaysPerformFMANegOpt(VT);
   if (shouldPerformFMANegOpt)
     if (SDValue Neg = TLI.getCheaperNegatedExpression(
             SDValue(N, 0), DAG, LegalOperations, ForCodeSize))
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 6ce9d5ea9..7a08c644a 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -2652,22 +2652,21 @@ bool RISCVTargetLowering::signExtendConstant(const ConstantInt *CI) const {
 bool RISCVTargetLowering::isFNegFree(EVT VT) const {
   if (!VT.isFloatingPoint())
     return false;
-  return (VT == MVT::f64 && Subtarget.is64Bit() &&
-          Subtarget.hasStdExtD() && !Subtarget.hasStdExtZdinx()) ||
-         (VT == MVT::f32 && Subtarget.hasStdExtF() && 
+  return (VT == MVT::f64 && Subtarget.is64Bit() && Subtarget.hasStdExtD() &&
+          !Subtarget.hasStdExtZdinx()) ||
+         (VT == MVT::f32 && Subtarget.hasStdExtF() &&
           !Subtarget.hasStdExtZfinx());
 }
 
 bool RISCVTargetLowering::shouldAlwaysPerformFMANegOpt(EVT VT) const {
   if (!VT.isFloatingPoint())
     return false;
-  return (VT == MVT::f64 && Subtarget.is64Bit() &&
-          Subtarget.hasStdExtD() && !Subtarget.hasStdExtZdinx()) ||
-         (VT == MVT::f32 && Subtarget.hasStdExtF() && 
+  return (VT == MVT::f64 && Subtarget.is64Bit() && Subtarget.hasStdExtD() &&
+          !Subtarget.hasStdExtZdinx()) ||
+         (VT == MVT::f32 && Subtarget.hasStdExtF() &&
           !Subtarget.hasStdExtZfinx());
 }
 
-
 bool RISCVTargetLowering::isCheapToSpeculateCttz(Type *Ty) const {
   return Subtarget.hasCTZLike();
 }

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https://github.com/llvm/llvm-project/pull/216659