[llvm] CodeGen: Fix MachineSink trivial coalescing crash on an undef register (PR #216632)

[Matt Arsenault via llvm-commits]

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/216632

Fix unchecked getVRegDef use. Found by AI while working on something else.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>

>From c11305e2a3ad582f1f631fd584f262128a55af6d Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Sun, 16 Aug 2026 11:13:20 +0200
Subject: [PATCH] CodeGen: Fix MachineSink trivial coalescing crash on an undef
 register

Fix unchecked getVRegDef use. Found by AI while working on something else.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
---
 llvm/lib/CodeGen/MachineSink.cpp              |  2 +-
 .../X86/machinesink-coalesce-undef.mir        | 39 +++++++++++++++++++
 2 files changed, 40 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/X86/machinesink-coalesce-undef.mir

diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index d097c8f1268f3..2472005369c0a 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -391,7 +391,7 @@ bool MachineSinking::PerformTrivialForwardCoalescing(MachineInstr &MI,
     return false;
 
   MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
-  if (DefMI->isCopyLike())
+  if (!DefMI || DefMI->isCopyLike())
     return false;
   LLVM_DEBUG(dbgs() << "Coalescing: " << *DefMI);
   LLVM_DEBUG(dbgs() << "*** to: " << MI);
diff --git a/llvm/test/CodeGen/X86/machinesink-coalesce-undef.mir b/llvm/test/CodeGen/X86/machinesink-coalesce-undef.mir
new file mode 100644
index 0000000000000..54e0c1d701321
--- /dev/null
+++ b/llvm/test/CodeGen/X86/machinesink-coalesce-undef.mir
@@ -0,0 +1,39 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+# RUN: llc -mtriple=x86_64-- -run-pass=machine-sink -o - %s | FileCheck %s
+# A copy whose source is an undef register with no def must not crash
+# the machine sinker's trivial forward coalescing, which inspects the
+# source's defining instruction.
+
+---
+name: coalesce_undef_copy
+tracksRegLiveness: true
+body: |
+  ; CHECK-LABEL: name: coalesce_undef_copy
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:gr32 = COPY undef %1:gr32
+  ; CHECK-NEXT:   TEST32rr [[COPY]], [[COPY]], implicit-def $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.2, 5, implicit $eflags
+  ; CHECK-NEXT:   JMP_1 %bb.1
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   $eax = COPY [[COPY]]
+  ; CHECK-NEXT:   RET64 implicit $eax
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   RET64
+  bb.0:
+    successors: %bb.1, %bb.2
+    %0:gr32 = COPY undef %1:gr32
+    TEST32rr %0, %0, implicit-def $eflags
+    JCC_1 %bb.2, 5, implicit $eflags
+    JMP_1 %bb.1
+
+  bb.1:
+    $eax = COPY %0
+    RET64 implicit $eax
+
+  bb.2:
+    RET64
+...