[llvm] [GlobalISel] Add G_UITOFP, G_SITOFP to computeKnownBits (PR #215766)
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Sun Aug 16 20:13:49 PDT 2026
https://github.com/Bhuvan1527 updated https://github.com/llvm/llvm-project/pull/215766
>From e86a3e77781e2bc1452ad43ae4c2403745dda99f Mon Sep 17 00:00:00 2001
From: Bhuvan1527 <balabhuvanvarma at gmail.com>
Date: Wed, 12 Aug 2026 15:17:06 +0530
Subject: [PATCH 1/2] [GlobalISel] Add G_UITOFP, G_SITOFP, and G_FPTOUI_SAT to
computeKnownBits
Related: https://github.com/llvm/llvm-project/issues/150515
Ticks: UINT_TO_FP, SINT_TO_FP, FP_TO_UINT_SAT
---
.../CodeGen/GlobalISel/GISelValueTracking.cpp | 20 ++++++++
.../GlobalISel/int-to-float-conversion.mir | 50 +++++++++++++++++++
2 files changed, 70 insertions(+)
create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/int-to-float-conversion.mir
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
index 0ffc368178cfc..f77d4eab93418 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
@@ -28,6 +28,7 @@
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Register.h"
+#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/IR/ConstantRange.h"
@@ -822,6 +823,25 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known,
Known.One.clearLowBits(LogOfAlign);
break;
}
+ case TargetOpcode::G_UITOFP: {
+ Known.makeNonNegative();
+ break;
+ }
+ case TargetOpcode::G_SITOFP: {
+ computeKnownBitsImpl(MI.getOperand(1).getReg(), Known2, DemandedElts, Depth + 1);
+ if(Known2.isNonNegative())
+ Known.makeNonNegative();
+ else if(Known2.isNegative())
+ Known.makeNegative();
+ break;
+ }
+ case TargetOpcode::G_FPTOUI_SAT: {
+ // get scalarsizein bits of the destination type and set all bits to zero
+ Register Reg = MI.getOperand(2).getReg();
+ unsigned DestSize = MRI.getType(Reg).getScalarSizeInBits();
+ Known.Zero |= APInt::getBitsSetFrom(BitWidth, DestSize);
+ break;
+ }
case TargetOpcode::G_MERGE_VALUES: {
unsigned NumOps = MI.getNumOperands();
unsigned OpSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits();
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/int-to-float-conversion.mir b/llvm/test/CodeGen/AArch64/GlobalISel/int-to-float-conversion.mir
new file mode 100644
index 0000000000000..2f10b4f21fa3d
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/int-to-float-conversion.mir
@@ -0,0 +1,50 @@
+# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 6
+# RUN: llc -mtriple=aarch64 -passes="print<gisel-value-tracking>" -filetype=null %s 2>&1 | FileCheck %s
+
+---
+name: Cst_UITOFP_One
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @Cst_UITOFP_One
+ ; CHECK-NEXT: %0:_ KnownBits:00000000000000000000000000000001 SignBits:31 IsKnownNeverZero:1
+ ; CHECK-NEXT: %1:_ KnownBits:0??????????????????????????????? SignBits:1 IsKnownNeverZero:0
+ %0:_(s32) = G_CONSTANT i32 1
+ %1:_(s32) = G_UITOFP %0
+...
+---
+name: Cst_UITOFP_Max
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @Cst_UITOFP_Max
+ ; CHECK-NEXT: %0:_ KnownBits:11111111111111111111111111111111 SignBits:32 IsKnownNeverZero:1
+ ; CHECK-NEXT: %1:_ KnownBits:0??????????????????????????????? SignBits:1 IsKnownNeverZero:0
+ %0:_(s32) = G_CONSTANT i32 4294967295
+ %1:_(s32) = G_UITOFP %0
+...
+---
+name: Cst_SITOFP_Neg_One
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @Cst_SITOFP_Neg_One
+ ; CHECK-NEXT: %0:_ KnownBits:11111111111111111111111111111111 SignBits:32 IsKnownNeverZero:1
+ ; CHECK-NEXT: %1:_ KnownBits:1??????????????????????????????? SignBits:1 IsKnownNeverZero:1
+ %0:_(s32) = G_CONSTANT i32 -1
+ %1:_(s32) = G_SITOFP %0
+...
+---
+name: Cst_SITOFP_Max
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @Cst_SITOFP_Max
+ ; CHECK-NEXT: %0:_ KnownBits:01111111111111111111111111111111 SignBits:1 IsKnownNeverZero:1
+ ; CHECK-NEXT: %1:_ KnownBits:0??????????????????????????????? SignBits:1 IsKnownNeverZero:0
+ %0:_(s32) = G_CONSTANT i32 2147483647
+ %1:_(s32) = G_SITOFP %0
+...
+---
+name: Cst_FPTOUI_SAT_One
+body: |
+ bb.0:
+ %0:_(s32) = G_FCONSTANT float 1.000000e+00
+ %1:_(s32) = G_FPTOUI_SAT %0(s32)
+...
>From 25b4c4d702670068f2bfd52ba2c1ba02a8e0046e Mon Sep 17 00:00:00 2001
From: Bhuvan1527 <balabhuvanvarma at gmail.com>
Date: Wed, 12 Aug 2026 15:17:06 +0530
Subject: [PATCH 2/2] [GlobalISel] Add G_UITOFP and G_SITOFP to
computeKnownBits
Related: https://github.com/llvm/llvm-project/issues/150515
Ticks: UINT_TO_FP, SINT_TO_FP
---
llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp | 8 --------
.../AArch64/GlobalISel/int-to-float-conversion.mir | 7 -------
2 files changed, 15 deletions(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
index f77d4eab93418..353371aebf1c7 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
@@ -28,7 +28,6 @@
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Register.h"
-#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/IR/ConstantRange.h"
@@ -834,13 +833,6 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known,
else if(Known2.isNegative())
Known.makeNegative();
break;
- }
- case TargetOpcode::G_FPTOUI_SAT: {
- // get scalarsizein bits of the destination type and set all bits to zero
- Register Reg = MI.getOperand(2).getReg();
- unsigned DestSize = MRI.getType(Reg).getScalarSizeInBits();
- Known.Zero |= APInt::getBitsSetFrom(BitWidth, DestSize);
- break;
}
case TargetOpcode::G_MERGE_VALUES: {
unsigned NumOps = MI.getNumOperands();
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/int-to-float-conversion.mir b/llvm/test/CodeGen/AArch64/GlobalISel/int-to-float-conversion.mir
index 2f10b4f21fa3d..6145640e97274 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/int-to-float-conversion.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/int-to-float-conversion.mir
@@ -41,10 +41,3 @@ body: |
%0:_(s32) = G_CONSTANT i32 2147483647
%1:_(s32) = G_SITOFP %0
...
----
-name: Cst_FPTOUI_SAT_One
-body: |
- bb.0:
- %0:_(s32) = G_FCONSTANT float 1.000000e+00
- %1:_(s32) = G_FPTOUI_SAT %0(s32)
-...
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