[llvm] X86: Emit adox instead of adc for overflow add (PR #216609)

via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 16 15:20:14 PDT 2026


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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/X86/X86ISelLowering.cpp --diff_from_common_commit
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 69f6ff623..769f24cd8 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -25338,8 +25338,9 @@ static bool isX86LogicalCmp(SDValue Op) {
     return true;
   if (Op.getResNo() == 1 &&
       (Opc == X86ISD::ADD || Opc == X86ISD::SUB || Opc == X86ISD::ADC ||
-       Opc == X86ISD::ADOX || Opc == X86ISD::SBB || Opc == X86ISD::SMUL || Opc == X86ISD::UMUL ||
-       Opc == X86ISD::OR || Opc == X86ISD::XOR || Opc == X86ISD::AND))
+       Opc == X86ISD::ADOX || Opc == X86ISD::SBB || Opc == X86ISD::SMUL ||
+       Opc == X86ISD::UMUL || Opc == X86ISD::OR || Opc == X86ISD::XOR ||
+       Opc == X86ISD::AND))
     return true;
 
   return false;
@@ -53534,11 +53535,11 @@ static SDValue combineAddOrSubToADCOrSBB(bool IsSub, const SDLoc &DL, EVT VT,
                        DAG.getVTList(VT, MVT::i32), X,
                        DAG.getConstant(0, DL, VT), EFLAGS);
   }
-  
-  if (!IsSub && CC == X86::COND_O && DAG.getSubtarget<X86Subtarget>().hasADX()) {
+
+  if (!IsSub && CC == X86::COND_O &&
+      DAG.getSubtarget<X86Subtarget>().hasADX()) {
     // X + SETO Z --> adox X, 0
-    return DAG.getNode(X86ISD::ADOX, DL,
-                       DAG.getVTList(VT, MVT::i32), X,
+    return DAG.getNode(X86ISD::ADOX, DL, DAG.getVTList(VT, MVT::i32), X,
                        DAG.getConstant(0, DL, VT), EFLAGS);
   }
 

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https://github.com/llvm/llvm-project/pull/216609


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