[llvm] 85cffe6 - AMDGPU: Use m_GTrunc in selector def check (#216511)

via llvm-commits llvm-commits at lists.llvm.org
Sat Aug 15 15:47:49 PDT 2026


Author: Matt Arsenault
Date: 2026-08-15T22:47:43Z
New Revision: 85cffe68c6fbab89d719a8076a07b9873ab9d514

URL: https://github.com/llvm/llvm-project/commit/85cffe68c6fbab89d719a8076a07b9873ab9d514
DIFF: https://github.com/llvm/llvm-project/commit/85cffe68c6fbab89d719a8076a07b9873ab9d514.diff

LOG: AMDGPU: Use m_GTrunc in selector def check (#216511)

Prefer mi_match over raw getVRegDef + opcode checks.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 677312f4f0f52..0a5dbca02fea2 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -86,7 +86,7 @@ bool AMDGPUInstructionSelector::isVCC(Register Reg,
     if (!Ty.isValid() || Ty.getSizeInBits() != 1)
       return false;
     // G_TRUNC s1 result is never vcc.
-    return MRI.getVRegDef(Reg)->getOpcode() != AMDGPU::G_TRUNC &&
+    return !mi_match(Reg, MRI, m_GTrunc(m_Reg())) &&
            RC->hasSuperClassEq(TRI.getBoolRC());
   }
 


        


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