[llvm] f1c4362 - [RISCV] Simplify the Zibi SFB and select patterns. NFC (#216449)

via llvm-commits llvm-commits at lists.llvm.org
Sat Aug 15 08:32:50 PDT 2026


Author: Craig Topper
Date: 2026-08-15T08:32:45-07:00
New Revision: f1c43628899ee8087804f1fba8497488370278a1

URL: https://github.com/llvm/llvm-project/commit/f1c43628899ee8087804f1fba8497488370278a1
DIFF: https://github.com/llvm/llvm-project/commit/f1c43628899ee8087804f1fba8497488370278a1.diff

LOG: [RISCV] Simplify the Zibi SFB and select patterns. NFC (#216449)

Use a PatLeaf to match the valid condition codes instead of using
separate patterns for each.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
    llvm/lib/Target/RISCV/RISCVInstrInfoZibi.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td b/llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
index 3c9023b7f23f4..c82e357bdc565 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
@@ -262,14 +262,8 @@ def PseudoCCLD : SFBLoad;
 }
 
 // Zibi: select with immediate comparison folded into SFB.
-// imm5_zibi is defined in RISCVInstrInfoZibi.td (included before this file).
-class SelectZibiSFB<CondCode Cond>
-    : Pat<(riscv_selectcc (XLenVT GPR:$lhs), imm5_zibi:$cimm, Cond:$cc,
-                          (XLenVT GPR:$truev), GPR:$falsev),
-          (PseudoCCMOVGPR GPR:$falsev, GPR:$truev, (CCtoZibiBCC $cc), GPR:$lhs,
-                          imm5_zibi:$cimm)>;
-
-let Predicates = [HasStdExtZibi, HasShortForwardBranchIALU] in {
-  def : SelectZibiSFB<SETEQ>;
-  def : SelectZibiSFB<SETNE>;
-} // Predicates = [HasStdExtZibi, HasShortForwardBranchIALU]
+// imm5_zibi and ZibiCond are defined in RISCVInstrInfoZibi.td (included before
+// this file).
+let Predicates = [HasStdExtZibi, HasShortForwardBranchIALU] in
+def : Pat<(riscv_selectcc (XLenVT GPR:$lhs), imm5_zibi:$cimm, ZibiCond:$cc, (XLenVT GPR:$truev), GPR:$falsev),
+          (PseudoCCMOVGPR GPR:$falsev, GPR:$truev, (CCtoZibiBCC $cc), GPR:$lhs, imm5_zibi:$cimm)>;

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZibi.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZibi.td
index e7605f5385e40..b51eb51979420 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZibi.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZibi.td
@@ -26,6 +26,17 @@ def imm5_zibi : RISCVOp<XLenVT>, ImmLeaf<XLenVT, [{
   let OperandType = "OPERAND_IMM5_ZIBI";
 }
 
+// The condition codes supported by BEQI/BNEI.
+def ZibiCond : PatLeaf<(cond), [{
+  switch (N->get()) {
+  default:
+    return false;
+  case ISD::SETEQ:
+  case ISD::SETNE:
+    return true;
+  }
+}]>;
+
 class Branch_imm<bits<3> funct3, string opcodestr>
     : RVInstBIMM<funct3, OPC_BRANCH, (outs),
                  (ins GPR:$rs1, imm5_zibi:$cimm, bare_simm13_lsb0:$imm12),
@@ -55,15 +66,11 @@ multiclass BccImmPat<CondCode Cond, Branch_imm Inst> {
 
 defm CC_Imm5_Zibi : SelectCC_GPR_riirr<GPR, imm5_zibi>;
 
-class SelectZibi<CondCode Cond>
-    : Pat<(riscv_selectcc (XLenVT GPR:$lhs), imm5_zibi:$cimm, Cond:$cc,
-                          (XLenVT GPR:$truev), GPR:$falsev),
-          (Select_GPR_Using_CC_Imm5_Zibi GPR:$lhs, imm5_zibi:$cimm,
-              (CCtoRISCVCC $cc), GPR:$truev, GPR:$falsev)>;
-
 let Predicates = [HasStdExtZibi] in {
-  def : SelectZibi<SETEQ>;
-  def : SelectZibi<SETNE>;
+  def : Pat<(riscv_selectcc (XLenVT GPR:$lhs), imm5_zibi:$cimm, ZibiCond:$cc,
+                            (XLenVT GPR:$truev), GPR:$falsev),
+            (Select_GPR_Using_CC_Imm5_Zibi GPR:$lhs, imm5_zibi:$cimm,
+                (CCtoRISCVCC $cc), GPR:$truev, GPR:$falsev)>;
 
   defm : BccImmPat<SETEQ, BEQI>;
   defm : BccImmPat<SETNE, BNEI>;


        


More information about the llvm-commits mailing list