[llvm] [AMDGPU][MC] Fix a crash when invalid SDWA encoding is used (PR #215140)

[Shilei Tian via llvm-commits]

https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/215140

>From 0cd9f45aa0707ddb448c0806d04663a9b40c0ad4 Mon Sep 17 00:00:00 2001
From: Shilei Tian <i at tianshilei.me>
Date: Sun, 9 Aug 2026 16:10:28 -0400
Subject: [PATCH] [AMDGPU][MC] Fix a crash when invalid SDWA encoding is used

Fixes #215006.
---
 .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp   | 16 ++++++++++++++++
 llvm/lib/Target/AMDGPU/SIInstrInfo.td            |  5 ++++-
 .../MC/Disassembler/AMDGPU/gfx9_dasm_err.txt     | 14 ++++++++++++++
 3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
index c4ee69029ab41..40e8c58839879 100644
--- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -462,6 +462,22 @@ DECODE_SDWA(Src32)
 DECODE_SDWA(Src16)
 DECODE_SDWA(VopcDst)
 
+#define DECODE_SDWA_IMM_FIELD(Name, MaxImm)                                    \
+  static DecodeStatus Name(MCInst &Inst, unsigned Imm, uint64_t /* Addr */,    \
+                           const MCDisassembler * /* Decoder */) {             \
+    if (Imm > (MaxImm))                                                        \
+      return MCDisassembler::Fail;                                             \
+    return addOperand(Inst, MCOperand::createImm(Imm));                        \
+  }
+
+// The 3-bit SDWA sel fields only define values up to DWORD; 7 is reserved.
+DECODE_SDWA_IMM_FIELD(decodeSDWASel, AMDGPU::SDWA::SdwaSel::DWORD)
+// The 2-bit SDWA dst_unused field only defines values up to UNUSED_PRESERVE;
+// 3 is reserved.
+DECODE_SDWA_IMM_FIELD(decodeSDWADstUnused,
+                      AMDGPU::SDWA::DstUnused::UNUSED_PRESERVE)
+#undef DECODE_SDWA_IMM_FIELD
+
 static DecodeStatus decodeVersionImm(MCInst &Inst, unsigned Imm,
                                      uint64_t /* Addr */,
                                      const MCDisassembler *Decoder) {
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
index 0268afb2e494c..0e27eb9663c53 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
@@ -1280,6 +1280,7 @@ class SDWAOperand<string Id, string Name = NAME>
   let ParserMethod =
     "[this](OperandVector &Operands) -> ParseStatus { "#
     "return parseSDWASel(Operands, \""#Id#"\", AMDGPUOperand::"#ImmTy#"); }";
+  let DecoderMethod = "decodeSDWASel";
 }
 
 class ArrayOperand0<string Id, string Name = NAME>
@@ -1345,7 +1346,9 @@ def Dim : CustomOperand</*optional=*/1, type=i8>;
 def dst_sel : SDWAOperand<"dst_sel", "SDWADstSel">;
 def src0_sel : SDWAOperand<"src0_sel", "SDWASrc0Sel">;
 def src1_sel : SDWAOperand<"src1_sel", "SDWASrc1Sel">;
-def dst_unused : CustomOperand<1, "SDWADstUnused">;
+def dst_unused : CustomOperand<1, "SDWADstUnused"> {
+  let DecoderMethod = "decodeSDWADstUnused";
+}
 
 def op_sel0 : ArrayOperand0<"op_sel", "OpSel">;
 def op_sel_hi0 : ArrayOperand0<"op_sel_hi", "OpSelHi">;
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_err.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_err.txt
index 26b3746f30716..3431d1dcf93e1 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_err.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_err.txt
@@ -8,3 +8,17 @@
 # 7-bit scalar register encoding of the 8-bit VOP1 vdst field.
 0x00,0x05,0xf4,0x7f
 # GFX9-ERR: :[[@LINE-1]]:1: warning: invalid instruction encoding
+
+# These are v_add_f32_sdwa with a reserved value in one of the SDWA fields:
+# 7 in a 3-bit sel field and 3 in the 2-bit dst_unused field.
+# GCN-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
+0xf9,0x04,0x00,0x02,0x01,0x07,0x06,0x06
+
+# GCN-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
+0xf9,0x04,0x00,0x02,0x01,0x1e,0x06,0x06
+
+# GCN-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
+0xf9,0x04,0x00,0x02,0x01,0x06,0x07,0x06
+
+# GCN-ERR: [[@LINE+1]]:1: warning: invalid instruction encoding
+0xf9,0x04,0x00,0x02,0x01,0x06,0x06,0x07