[llvm] [AMDGPU] Fix unaligned SMEM dword immediate offsets (PR #216269)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h --diff_from_common_commit
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
index 99732b347..fd0cc1159 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -2638,15 +2638,15 @@ bool AMDGPUDAGToDAGISel::SelectSMRDImm(SDValue Addr, SDValue &SBase,
 
 bool AMDGPUDAGToDAGISel::SelectSMRDDwordImm(SDValue Addr, SDValue &SBase,
                                             SDValue &Offset) const {
-  if (!SelectSMRD(/* N */ nullptr, Addr, SBase, /* SOffset */ nullptr,
-                  &Offset))
+  if (!SelectSMRD(/* N */ nullptr, Addr, SBase, /* SOffset */ nullptr, &Offset))
     return false;
 
   // This selector is used for S_LOAD_DWORD* instructions. On GFX11+, their
   // immediate byte offset must be dword aligned. If an aligned address is split
   // into an unaligned base and a non-dword-aligned immediate (for example,
-  // 22 + 2), encoding them separately loses the carry from the low address bits.
-  // Materialize the complete address in sbase and use an immediate offset of 0.
+  // 22 + 2), encoding them separately loses the carry from the low address
+  // bits. Materialize the complete address in sbase and use an immediate offset
+  // of 0.
   auto *ConstantOffset = cast<ConstantSDNode>(Offset);
   if (Subtarget->getGeneration() >= AMDGPUSubtarget::GFX11 &&
       (ConstantOffset->getSExtValue() & 3) != 0) {

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https://github.com/llvm/llvm-project/pull/216269