[llvm] [LoongArch][NFC] Add tests for constant branch optimization (PR #216258)
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Thu Aug 13 23:42:54 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-loongarch
Author: hev (heiher)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/216258.diff
1 Files Affected:
- (added) llvm/test/CodeGen/LoongArch/branch-opt.ll (+408)
``````````diff
diff --git a/llvm/test/CodeGen/LoongArch/branch-opt.ll b/llvm/test/CodeGen/LoongArch/branch-opt.ll
new file mode 100644
index 0000000000000..2a7712afb44af
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/branch-opt.ll
@@ -0,0 +1,408 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch32 -mattr=-32s,+d --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA32R
+; RUN: llc --mtriple=loongarch32 -mattr=+32s,+d --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA32S
+; RUN: llc --mtriple=loongarch64 -mattr=+d --verify-machineinstrs < %s | FileCheck %s --check-prefix=LA64
+
+define i32 @br_eq() nounwind {
+; LA32R-LABEL: br_eq:
+; LA32R: # %bb.0: # %entry
+; LA32R-NEXT: beq $zero, $zero, .LBB0_2
+; LA32R-NEXT: # %bb.1:
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: ret
+; LA32R-NEXT: .LBB0_2:
+; LA32R-NEXT: move $a0, $zero
+; LA32R-NEXT: ret
+;
+; LA32S-LABEL: br_eq:
+; LA32S: # %bb.0: # %entry
+; LA32S-NEXT: beqz $zero, .LBB0_2
+; LA32S-NEXT: # %bb.1:
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: ret
+; LA32S-NEXT: .LBB0_2:
+; LA32S-NEXT: move $a0, $zero
+; LA32S-NEXT: ret
+;
+; LA64-LABEL: br_eq:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: beqz $zero, .LBB0_2
+; LA64-NEXT: # %bb.1:
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB0_2:
+; LA64-NEXT: move $a0, $zero
+; LA64-NEXT: ret
+entry:
+ %1 = icmp eq i32 0, 0
+ br i1 %1, label %2, label %3
+2:
+ ret i32 0
+3:
+ ret i32 1
+}
+
+define i32 @br_ne() nounwind {
+; LA32R-LABEL: br_ne:
+; LA32R: # %bb.0: # %entry
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: beq $a0, $zero, .LBB1_2
+; LA32R-NEXT: # %bb.1:
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: ret
+; LA32R-NEXT: .LBB1_2:
+; LA32R-NEXT: move $a0, $zero
+; LA32R-NEXT: ret
+;
+; LA32S-LABEL: br_ne:
+; LA32S: # %bb.0: # %entry
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: beqz $a0, .LBB1_2
+; LA32S-NEXT: # %bb.1:
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: ret
+; LA32S-NEXT: .LBB1_2:
+; LA32S-NEXT: move $a0, $zero
+; LA32S-NEXT: ret
+;
+; LA64-LABEL: br_ne:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: beqz $a0, .LBB1_2
+; LA64-NEXT: # %bb.1:
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB1_2:
+; LA64-NEXT: move $a0, $zero
+; LA64-NEXT: ret
+entry:
+ %1 = icmp ne i32 0, 1
+ br i1 %1, label %3, label %2
+2:
+ ret i32 0
+3:
+ ret i32 1
+}
+
+define i32 @br_lt() nounwind {
+; LA32R-LABEL: br_lt:
+; LA32R: # %bb.0: # %entry
+; LA32R-NEXT: beq $zero, $zero, .LBB2_2
+; LA32R-NEXT: # %bb.1:
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: ret
+; LA32R-NEXT: .LBB2_2:
+; LA32R-NEXT: move $a0, $zero
+; LA32R-NEXT: ret
+;
+; LA32S-LABEL: br_lt:
+; LA32S: # %bb.0: # %entry
+; LA32S-NEXT: beqz $zero, .LBB2_2
+; LA32S-NEXT: # %bb.1:
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: ret
+; LA32S-NEXT: .LBB2_2:
+; LA32S-NEXT: move $a0, $zero
+; LA32S-NEXT: ret
+;
+; LA64-LABEL: br_lt:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: beqz $zero, .LBB2_2
+; LA64-NEXT: # %bb.1:
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB2_2:
+; LA64-NEXT: move $a0, $zero
+; LA64-NEXT: ret
+entry:
+ %1 = icmp slt i32 0, 1
+ br i1 %1, label %2, label %3
+2:
+ ret i32 0
+3:
+ ret i32 1
+}
+
+define i32 @br_le() nounwind {
+; LA32R-LABEL: br_le:
+; LA32R: # %bb.0: # %entry
+; LA32R-NEXT: bne $zero, $zero, .LBB3_2
+; LA32R-NEXT: # %bb.1:
+; LA32R-NEXT: move $a0, $zero
+; LA32R-NEXT: ret
+; LA32R-NEXT: .LBB3_2:
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: ret
+;
+; LA32S-LABEL: br_le:
+; LA32S: # %bb.0: # %entry
+; LA32S-NEXT: bnez $zero, .LBB3_2
+; LA32S-NEXT: # %bb.1:
+; LA32S-NEXT: move $a0, $zero
+; LA32S-NEXT: ret
+; LA32S-NEXT: .LBB3_2:
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: ret
+;
+; LA64-LABEL: br_le:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: bnez $zero, .LBB3_2
+; LA64-NEXT: # %bb.1:
+; LA64-NEXT: move $a0, $zero
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB3_2:
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: ret
+entry:
+ %1 = icmp sle i32 0, 1
+ br i1 %1, label %2, label %3
+2:
+ ret i32 0
+3:
+ ret i32 1
+}
+
+define i32 @br_gt() nounwind {
+; LA32R-LABEL: br_gt:
+; LA32R: # %bb.0: # %entry
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: beq $a0, $zero, .LBB4_2
+; LA32R-NEXT: # %bb.1:
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: ret
+; LA32R-NEXT: .LBB4_2:
+; LA32R-NEXT: move $a0, $zero
+; LA32R-NEXT: ret
+;
+; LA32S-LABEL: br_gt:
+; LA32S: # %bb.0: # %entry
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: beqz $a0, .LBB4_2
+; LA32S-NEXT: # %bb.1:
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: ret
+; LA32S-NEXT: .LBB4_2:
+; LA32S-NEXT: move $a0, $zero
+; LA32S-NEXT: ret
+;
+; LA64-LABEL: br_gt:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: beqz $a0, .LBB4_2
+; LA64-NEXT: # %bb.1:
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB4_2:
+; LA64-NEXT: move $a0, $zero
+; LA64-NEXT: ret
+entry:
+ %1 = icmp sgt i32 1, 0
+ br i1 %1, label %3, label %2
+2:
+ ret i32 0
+3:
+ ret i32 1
+}
+
+define i32 @br_ge() nounwind {
+; LA32R-LABEL: br_ge:
+; LA32R: # %bb.0: # %entry
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: beq $a0, $zero, .LBB5_2
+; LA32R-NEXT: # %bb.1:
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: ret
+; LA32R-NEXT: .LBB5_2:
+; LA32R-NEXT: move $a0, $zero
+; LA32R-NEXT: ret
+;
+; LA32S-LABEL: br_ge:
+; LA32S: # %bb.0: # %entry
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: beqz $a0, .LBB5_2
+; LA32S-NEXT: # %bb.1:
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: ret
+; LA32S-NEXT: .LBB5_2:
+; LA32S-NEXT: move $a0, $zero
+; LA32S-NEXT: ret
+;
+; LA64-LABEL: br_ge:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: beqz $a0, .LBB5_2
+; LA64-NEXT: # %bb.1:
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB5_2:
+; LA64-NEXT: move $a0, $zero
+; LA64-NEXT: ret
+entry:
+ %1 = icmp sge i32 1, 0
+ br i1 %1, label %3, label %2
+2:
+ ret i32 0
+3:
+ ret i32 1
+}
+
+define i32 @br_ltu() nounwind {
+; LA32R-LABEL: br_ltu:
+; LA32R: # %bb.0: # %entry
+; LA32R-NEXT: bne $zero, $zero, .LBB6_2
+; LA32R-NEXT: # %bb.1:
+; LA32R-NEXT: move $a0, $zero
+; LA32R-NEXT: ret
+; LA32R-NEXT: .LBB6_2:
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: ret
+;
+; LA32S-LABEL: br_ltu:
+; LA32S: # %bb.0: # %entry
+; LA32S-NEXT: bnez $zero, .LBB6_2
+; LA32S-NEXT: # %bb.1:
+; LA32S-NEXT: move $a0, $zero
+; LA32S-NEXT: ret
+; LA32S-NEXT: .LBB6_2:
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: ret
+;
+; LA64-LABEL: br_ltu:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: bnez $zero, .LBB6_2
+; LA64-NEXT: # %bb.1:
+; LA64-NEXT: move $a0, $zero
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB6_2:
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: ret
+entry:
+ %1 = icmp ult i32 0, 1
+ br i1 %1, label %2, label %3
+2:
+ ret i32 0
+3:
+ ret i32 1
+}
+
+define i32 @br_leu() nounwind {
+; LA32R-LABEL: br_leu:
+; LA32R: # %bb.0: # %entry
+; LA32R-NEXT: bne $zero, $zero, .LBB7_2
+; LA32R-NEXT: # %bb.1:
+; LA32R-NEXT: move $a0, $zero
+; LA32R-NEXT: ret
+; LA32R-NEXT: .LBB7_2:
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: ret
+;
+; LA32S-LABEL: br_leu:
+; LA32S: # %bb.0: # %entry
+; LA32S-NEXT: bnez $zero, .LBB7_2
+; LA32S-NEXT: # %bb.1:
+; LA32S-NEXT: move $a0, $zero
+; LA32S-NEXT: ret
+; LA32S-NEXT: .LBB7_2:
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: ret
+;
+; LA64-LABEL: br_leu:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: bnez $zero, .LBB7_2
+; LA64-NEXT: # %bb.1:
+; LA64-NEXT: move $a0, $zero
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB7_2:
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: ret
+entry:
+ %1 = icmp ule i32 0, 1
+ br i1 %1, label %2, label %3
+2:
+ ret i32 0
+3:
+ ret i32 1
+}
+
+define i32 @br_gtu() nounwind {
+; LA32R-LABEL: br_gtu:
+; LA32R: # %bb.0: # %entry
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: beq $a0, $zero, .LBB8_2
+; LA32R-NEXT: # %bb.1:
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: ret
+; LA32R-NEXT: .LBB8_2:
+; LA32R-NEXT: move $a0, $zero
+; LA32R-NEXT: ret
+;
+; LA32S-LABEL: br_gtu:
+; LA32S: # %bb.0: # %entry
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: beqz $a0, .LBB8_2
+; LA32S-NEXT: # %bb.1:
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: ret
+; LA32S-NEXT: .LBB8_2:
+; LA32S-NEXT: move $a0, $zero
+; LA32S-NEXT: ret
+;
+; LA64-LABEL: br_gtu:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: beqz $a0, .LBB8_2
+; LA64-NEXT: # %bb.1:
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB8_2:
+; LA64-NEXT: move $a0, $zero
+; LA64-NEXT: ret
+entry:
+ %1 = icmp ugt i32 1, 0
+ br i1 %1, label %3, label %2
+2:
+ ret i32 0
+3:
+ ret i32 1
+}
+define i32 @br_geu() nounwind {
+; LA32R-LABEL: br_geu:
+; LA32R: # %bb.0: # %entry
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: beq $a0, $zero, .LBB9_2
+; LA32R-NEXT: # %bb.1:
+; LA32R-NEXT: ori $a0, $zero, 1
+; LA32R-NEXT: ret
+; LA32R-NEXT: .LBB9_2:
+; LA32R-NEXT: move $a0, $zero
+; LA32R-NEXT: ret
+;
+; LA32S-LABEL: br_geu:
+; LA32S: # %bb.0: # %entry
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: beqz $a0, .LBB9_2
+; LA32S-NEXT: # %bb.1:
+; LA32S-NEXT: ori $a0, $zero, 1
+; LA32S-NEXT: ret
+; LA32S-NEXT: .LBB9_2:
+; LA32S-NEXT: move $a0, $zero
+; LA32S-NEXT: ret
+;
+; LA64-LABEL: br_geu:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: beqz $a0, .LBB9_2
+; LA64-NEXT: # %bb.1:
+; LA64-NEXT: ori $a0, $zero, 1
+; LA64-NEXT: ret
+; LA64-NEXT: .LBB9_2:
+; LA64-NEXT: move $a0, $zero
+; LA64-NEXT: ret
+entry:
+ %1 = icmp uge i32 1, 0
+ br i1 %1, label %3, label %2
+2:
+ ret i32 0
+3:
+ ret i32 1
+}
``````````
</details>
https://github.com/llvm/llvm-project/pull/216258
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