[llvm] [X86][APX] Add missing VRM argument (PR #216240)

[via llvm-commits]

llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-x86

Author: Phoebe Wang (phoebewang)

<details>
<summary>Changes</summary>

It happens when a rematerialized load is from global variable, see https://godbolt.org/z/ddsh8PP4K

Assisted-by: Claude Opus 4.8

---
Full diff: https://github.com/llvm/llvm-project/pull/216240.diff


2 Files Affected:

- (modified) llvm/lib/Target/X86/X86InstrInfo.cpp (+1-1) 
- (added) llvm/test/CodeGen/X86/apx/memfold-remat-physreg.ll (+74) 


``````````diff
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index d01236277b4f8..2087f2bfc9c88 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -8687,7 +8687,7 @@ X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
   }
   return foldMemoryOperandImpl(MF, MI, Ops[0], MOs, InsertPt,
                                /*Size=*/0, Alignment, /*AllowCommute=*/true,
-                               CopyMI);
+                               CopyMI, VRM);
 }
 
 MachineInstr *
diff --git a/llvm/test/CodeGen/X86/apx/memfold-remat-physreg.ll b/llvm/test/CodeGen/X86/apx/memfold-remat-physreg.ll
new file mode 100644
index 0000000000000..c86349519b3fd
--- /dev/null
+++ b/llvm/test/CodeGen/X86/apx/memfold-remat-physreg.ll
@@ -0,0 +1,74 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc < %s -mtriple=x86_64 -mattr=+ndd -verify-machineinstrs | FileCheck %s
+
+ at mask = external dso_local constant i32
+
+define ptr @foo(ptr %p1, ptr %p2, ptr %p3, i1 %cond) nounwind {
+; CHECK-LABEL: foo:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    pushq %rbp
+; CHECK-NEXT:    pushq %r15
+; CHECK-NEXT:    pushq %r14
+; CHECK-NEXT:    pushq %r13
+; CHECK-NEXT:    pushq %r12
+; CHECK-NEXT:    pushq %rbx
+; CHECK-NEXT:    pushq %rax
+; CHECK-NEXT:    movl %ecx, %ebx
+; CHECK-NEXT:    movq %rdx, %r14
+; CHECK-NEXT:    movq %rsi, %r15
+; CHECK-NEXT:    movq %rdi, %r12
+; CHECK-NEXT:    xorl %r13d, %r13d
+; CHECK-NEXT:    xorl %ebp, %ebp
+; CHECK-NEXT:    jmp .LBB0_1
+; CHECK-NEXT:    .p2align 4
+; CHECK-NEXT:  .LBB0_3: # %latch
+; CHECK-NEXT:    # in Loop: Header=BB0_1 Depth=1
+; CHECK-NEXT:    movq (%rbp), %rbp
+; CHECK-NEXT:  .LBB0_1: # %loop
+; CHECK-NEXT:    # =>This Loop Header: Depth=1
+; CHECK-NEXT:    # Child Loop BB0_2 Depth 2
+; CHECK-NEXT:    movl 0, %eax
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    movl mask(%rip), %ecx
+; CHECK-NEXT:    andl %ecx, %eax
+; CHECK-NEXT:    cmpl $1, %eax
+; CHECK-NEXT:    jne .LBB0_3
+; CHECK-NEXT:    .p2align 4
+; CHECK-NEXT:  .LBB0_2: # %body
+; CHECK-NEXT:    # Parent Loop BB0_1 Depth=1
+; CHECK-NEXT:    # => This Inner Loop Header: Depth=2
+; CHECK-NEXT:    xorl %edi, %edi
+; CHECK-NEXT:    xorl %esi, %esi
+; CHECK-NEXT:    xorl %edx, %edx
+; CHECK-NEXT:    movq %r15, %rcx
+; CHECK-NEXT:    callq *%r13
+; CHECK-NEXT:    xorl %edi, %edi
+; CHECK-NEXT:    movq %r14, %rsi
+; CHECK-NEXT:    xorl %edx, %edx
+; CHECK-NEXT:    movq %r12, %rcx
+; CHECK-NEXT:    callq *%r13
+; CHECK-NEXT:    testb $1, %bl
+; CHECK-NEXT:    je .LBB0_2
+; CHECK-NEXT:    jmp .LBB0_3
+entry:
+  br label %loop
+
+loop:                                             ; preds = %latch, %entry
+  %iv = phi ptr [ %next, %latch ], [ null, %entry ]
+  %gep = getelementptr i8, ptr %iv, i64 8
+  %m = load i32, ptr @mask, align 4
+  %v = load i32, ptr null, align 8
+  %neg = sub i32 0, %v
+  %and = and i32 %m, %neg
+  %cmp = icmp eq i32 %and, 1
+  br i1 %cmp, label %body, label %latch
+
+body:                                             ; preds = %body, %loop
+  %call = call i32 null(ptr null, ptr null, ptr null, ptr %p2)
+  call void null(ptr null, ptr %p3, ptr null, ptr %p1)
+  br i1 %cond, label %latch, label %body
+
+latch:                                            ; preds = %body, %loop
+  %next = load ptr, ptr %iv, align 8
+  br label %loop
+}

``````````

</details>


https://github.com/llvm/llvm-project/pull/216240