[llvm] [InstCombine] Don't assert on samesign ule/uge of sext (PR #216079)

[Yingwei Zheng via llvm-commits]

================
@@ -4087,6 +4087,27 @@ static Value *simplifyICmpInst(CmpPredicate Pred, Value *LHS, Value *RHS,
         // Otherwise the upper bits of LHS are all equal, while RHS has varying
         // bits there.  Use this to work out the result of the comparison.
         if (AnyEq->isNullValue()) {
+          // icmp samesign with an unrepresentable C: matching signs make the
----------------
dtcxzyw wrote:

Just absorb the logic into the switch below. You can simply convert a same-sign unsigned Pred into a signed one.
`switch(Pred)` -> `switch(Pred.getPreferredSignedPredicate())`


https://github.com/llvm/llvm-project/pull/216079