[llvm] fdc1789 - CodeGen: Pass the exception model to the EH register hooks (#216099)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 13 09:58:38 PDT 2026
Author: Matt Arsenault
Date: 2026-08-13T16:58:33Z
New Revision: fdc178994aa78fd285e2ffe7673b1150510b5e83
URL: https://github.com/llvm/llvm-project/commit/fdc178994aa78fd285e2ffe7673b1150510b5e83
DIFF: https://github.com/llvm/llvm-project/commit/fdc178994aa78fd285e2ffe7673b1150510b5e83.diff
LOG: CodeGen: Pass the exception model to the EH register hooks (#216099)
Currently this is sourced from TargetOptions. In the future
this should come from program state, so needs to be passed in
from a value derived from the module flag. Thread through the
argument for future use. For now it's still sourced directly
from the TargetOptions.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Added:
Modified:
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/include/llvm/Support/CodeGen.h
llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
llvm/lib/CodeGen/MachineBasicBlock.cpp
llvm/lib/CodeGen/MachineLICM.cpp
llvm/lib/CodeGen/RDFGraph.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/ARM/ARMISelLowering.h
llvm/lib/Target/BPF/BPFISelLowering.h
llvm/lib/Target/CSKY/CSKYISelLowering.cpp
llvm/lib/Target/CSKY/CSKYISelLowering.h
llvm/lib/Target/Hexagon/HexagonISelLowering.h
llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
llvm/lib/Target/LoongArch/LoongArchISelLowering.h
llvm/lib/Target/M68k/M68kISelLowering.cpp
llvm/lib/Target/M68k/M68kISelLowering.h
llvm/lib/Target/Mips/MipsISelLowering.h
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/lib/Target/Sparc/SparcISelLowering.h
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
llvm/lib/Target/SystemZ/SystemZISelLowering.h
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.h
llvm/lib/Target/XCore/XCoreFrameLowering.cpp
llvm/lib/Target/XCore/XCoreISelLowering.h
llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
llvm/lib/Target/Xtensa/XtensaISelLowering.h
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 46b52c30cded6..c8aa38afc5dd0 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -72,6 +72,7 @@ class CCValAssign;
enum class ComplexDeinterleavingOperation;
enum class ComplexDeinterleavingRotation;
class Constant;
+enum class ExceptionHandling : int;
class FastISel;
class FunctionLoweringInfo;
class GlobalValue;
@@ -2149,14 +2150,16 @@ class LLVM_ABI TargetLoweringBase {
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
virtual Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const {
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const {
return Register();
}
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
virtual Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const {
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const {
return Register();
}
diff --git a/llvm/include/llvm/Support/CodeGen.h b/llvm/include/llvm/Support/CodeGen.h
index dfe426f9cc88a..e61a36ed42d96 100644
--- a/llvm/include/llvm/Support/CodeGen.h
+++ b/llvm/include/llvm/Support/CodeGen.h
@@ -51,7 +51,7 @@ namespace llvm {
};
}
- enum class ExceptionHandling {
+ enum class ExceptionHandling : int {
None, ///< No exception support
DwarfCFI, ///< DWARF-like instruction based exceptions
SjLj, ///< setjmp/longjmp based exceptions
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index 221e42b6c09e4..2461d53978f93 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -3189,8 +3189,10 @@ bool IRTranslator::translateLandingPad(const User &U,
// If there aren't registers to copy the values into (e.g., during SjLj
// exceptions), then don't bother.
const Constant *PersonalityFn = MF->getFunction().getPersonalityFn();
- if (TLI->getExceptionPointerRegister(PersonalityFn) == 0 &&
- TLI->getExceptionSelectorRegister(PersonalityFn) == 0)
+ if (TLI->getExceptionPointerRegister(
+ TLI->getTargetMachine().getExceptionModel(), PersonalityFn) == 0 &&
+ TLI->getExceptionSelectorRegister(
+ TLI->getTargetMachine().getExceptionModel(), PersonalityFn) == 0)
return true;
// If landingpad's return type is token type, we don't create DAG nodes
@@ -3221,7 +3223,8 @@ bool IRTranslator::translateLandingPad(const User &U,
assert(Tys.size() == 2 && "Only two-valued landingpads are supported");
// Mark exception register as live in.
- Register ExceptionReg = TLI->getExceptionPointerRegister(PersonalityFn);
+ Register ExceptionReg = TLI->getExceptionPointerRegister(
+ TLI->getTargetMachine().getExceptionModel(), PersonalityFn);
if (!ExceptionReg)
return false;
@@ -3229,7 +3232,8 @@ bool IRTranslator::translateLandingPad(const User &U,
ArrayRef<Register> ResRegs = getOrCreateVRegs(LP);
MIRBuilder.buildCopy(ResRegs[0], ExceptionReg);
- Register SelectorReg = TLI->getExceptionSelectorRegister(PersonalityFn);
+ Register SelectorReg = TLI->getExceptionSelectorRegister(
+ TLI->getTargetMachine().getExceptionModel(), PersonalityFn);
if (!SelectorReg)
return false;
diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index 2b238e0e70c30..e40a35c7b2425 100644
--- a/llvm/lib/CodeGen/MachineBasicBlock.cpp
+++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp
@@ -1830,8 +1830,10 @@ MachineBasicBlock::liveout_iterator MachineBasicBlock::liveout_begin() const {
MCRegister ExceptionPointer, ExceptionSelector;
if (MF.getFunction().hasPersonalityFn()) {
auto PersonalityFn = MF.getFunction().getPersonalityFn();
- ExceptionPointer = TLI.getExceptionPointerRegister(PersonalityFn);
- ExceptionSelector = TLI.getExceptionSelectorRegister(PersonalityFn);
+ ExceptionPointer = TLI.getExceptionPointerRegister(
+ TLI.getTargetMachine().getExceptionModel(), PersonalityFn);
+ ExceptionSelector = TLI.getExceptionSelectorRegister(
+ TLI.getTargetMachine().getExceptionModel(), PersonalityFn);
}
return liveout_iterator(*this, ExceptionPointer, ExceptionSelector, false);
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp
index f1ace5551a9fc..6435bbb9382c1 100644
--- a/llvm/lib/CodeGen/MachineLICM.cpp
+++ b/llvm/lib/CodeGen/MachineLICM.cpp
@@ -50,6 +50,7 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
+#include "llvm/Target/TargetMachine.h"
#include <cassert>
#include <limits>
#include <vector>
@@ -634,10 +635,12 @@ void MachineLICMImpl::HoistRegionPostRA(MachineLoop *CurLoop) {
const MachineFunction &MF = *BB->getParent();
const Constant *PersonalityFn = MF.getFunction().getPersonalityFn();
const TargetLowering &TLI = *MF.getSubtarget().getTargetLowering();
- if (MCRegister Reg = TLI.getExceptionPointerRegister(PersonalityFn))
+ if (MCRegister Reg = TLI.getExceptionPointerRegister(
+ TLI.getTargetMachine().getExceptionModel(), PersonalityFn))
for (MCRegUnit Unit : TRI->regunits(Reg))
RUClobbers.set(static_cast<unsigned>(Unit));
- if (MCRegister Reg = TLI.getExceptionSelectorRegister(PersonalityFn))
+ if (MCRegister Reg = TLI.getExceptionSelectorRegister(
+ TLI.getTargetMachine().getExceptionModel(), PersonalityFn))
for (MCRegUnit Unit : TRI->regunits(Reg))
RUClobbers.set(static_cast<unsigned>(Unit));
}
diff --git a/llvm/lib/CodeGen/RDFGraph.cpp b/llvm/lib/CodeGen/RDFGraph.cpp
index c56cdd196a9d8..3ae8eebb5b904 100644
--- a/llvm/lib/CodeGen/RDFGraph.cpp
+++ b/llvm/lib/CodeGen/RDFGraph.cpp
@@ -29,6 +29,7 @@
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
+#include "llvm/Target/TargetMachine.h"
#include <cassert>
#include <cstdint>
#include <cstring>
@@ -745,10 +746,12 @@ RegisterAggr DataFlowGraph::getLandingPadLiveIns() const {
const Function &F = MF.getFunction();
const Constant *PF = F.hasPersonalityFn() ? F.getPersonalityFn() : nullptr;
const TargetLowering &TLI = *MF.getSubtarget().getTargetLowering();
- if (RegisterId R = TLI.getExceptionPointerRegister(PF))
+ if (RegisterId R = TLI.getExceptionPointerRegister(
+ TLI.getTargetMachine().getExceptionModel(), PF))
LR.insert(RegisterRef(R));
if (!isFuncletEHPersonality(classifyEHPersonality(PF))) {
- if (RegisterId R = TLI.getExceptionSelectorRegister(PF))
+ if (RegisterId R = TLI.getExceptionSelectorRegister(
+ TLI.getTargetMachine().getExceptionModel(), PF))
LR.insert(RegisterRef(R));
}
return LR;
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 00263375f5007..b3e22ff50d4bd 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -3639,8 +3639,10 @@ void SelectionDAGBuilder::visitLandingPad(const LandingPadInst &LP) {
// exceptions), then don't bother to create these DAG nodes.
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
const Constant *PersonalityFn = FuncInfo.Fn->getPersonalityFn();
- if (TLI.getExceptionPointerRegister(PersonalityFn) == 0 &&
- TLI.getExceptionSelectorRegister(PersonalityFn) == 0)
+ if (TLI.getExceptionPointerRegister(
+ TLI.getTargetMachine().getExceptionModel(), PersonalityFn) == 0 &&
+ TLI.getExceptionSelectorRegister(
+ TLI.getTargetMachine().getExceptionModel(), PersonalityFn) == 0)
return;
// If landingpad's return type is token type, we don't create DAG nodes
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index a9140c740eeb4..3d97a06cc1767 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -1455,7 +1455,8 @@ bool SelectionDAGISel::PrepareEHLandingPad() {
if (hasExceptionPointerOrCodeUser(CPI)) {
// Get or create the virtual register to hold the pointer or code. Mark
// the live in physreg and copy into the vreg.
- MCRegister EHPhysReg = TLI->getExceptionPointerRegister(PersonalityFn);
+ MCRegister EHPhysReg = TLI->getExceptionPointerRegister(
+ TLI->getTargetMachine().getExceptionModel(), PersonalityFn);
assert(EHPhysReg && "target lacks exception pointer register");
MBB->addLiveIn(EHPhysReg);
Register VReg = FuncInfo->getCatchPadExceptionPointerVReg(CPI, PtrRC);
@@ -1488,10 +1489,12 @@ bool SelectionDAGISel::PrepareEHLandingPad() {
// Assign the call site to the landing pad's begin label.
MF->setCallSiteLandingPad(Label, SDB->LPadToCallSiteMap[MBB]);
// Mark exception register as live in.
- if (MCRegister Reg = TLI->getExceptionPointerRegister(PersonalityFn))
+ if (MCRegister Reg = TLI->getExceptionPointerRegister(
+ TLI->getTargetMachine().getExceptionModel(), PersonalityFn))
FuncInfo->ExceptionPointerVirtReg = MBB->addLiveIn(Reg, PtrRC);
// Mark exception selector register as live in.
- if (MCRegister Reg = TLI->getExceptionSelectorRegister(PersonalityFn))
+ if (MCRegister Reg = TLI->getExceptionSelectorRegister(
+ TLI->getTargetMachine().getExceptionModel(), PersonalityFn))
FuncInfo->ExceptionSelectorVirtReg = MBB->addLiveIn(Reg, PtrRC);
}
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 5187c3e7f97ba..e9fdaaab967af 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -33071,7 +33071,7 @@ Value *AArch64TargetLowering::getSafeStackPointerLocation(
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register AArch64TargetLowering::getExceptionPointerRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
// FIXME: This is a guess. Has this been defined yet?
return AArch64::X0;
}
@@ -33079,7 +33079,7 @@ Register AArch64TargetLowering::getExceptionPointerRegister(
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register AArch64TargetLowering::getExceptionSelectorRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
// FIXME: This is a guess. Has this been defined yet?
return AArch64::X1;
}
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
index b4952430958c7..2674d9bf16ca2 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
@@ -401,12 +401,14 @@ class AArch64TargetLowering : public TargetLowering {
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override;
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override;
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
bool isIntDivCheap(EVT VT, AttributeList Attr) const override;
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 3a31e072831aa..1560cbcc0fea8 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -22299,19 +22299,17 @@ bool ARMTargetLowering::functionArgumentNeedsConsecutiveRegisters(
}
Register ARMTargetLowering::getExceptionPointerRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
// Platforms which do not use SjLj EH may return values in these registers
// via the personality function.
- ExceptionHandling EM = getTargetMachine().getExceptionModel();
- return EM == ExceptionHandling::SjLj ? Register() : ARM::R0;
+ return EH == ExceptionHandling::SjLj ? Register() : ARM::R0;
}
Register ARMTargetLowering::getExceptionSelectorRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
// Platforms which do not use SjLj EH may return values in these registers
// via the personality function.
- ExceptionHandling EM = getTargetMachine().getExceptionModel();
- return EM == ExceptionHandling::SjLj ? Register() : ARM::R1;
+ return EH == ExceptionHandling::SjLj ? Register() : ARM::R1;
}
void ARMTargetLowering::initializeSplitCSR(MachineBasicBlock *Entry) const {
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index 2bbb91a8758e2..bbd635cbc4bbc 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -352,12 +352,14 @@ class VectorType;
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override;
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override;
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
Instruction *makeDMB(IRBuilderBase &Builder, ARM_MB::MemBOpt Domain) const;
Value *emitLoadLinked(IRBuilderBase &Builder, Type *ValueTy, Value *Addr,
diff --git a/llvm/lib/Target/BPF/BPFISelLowering.h b/llvm/lib/Target/BPF/BPFISelLowering.h
index c7a7d613d40af..8c00c8caa5bcd 100644
--- a/llvm/lib/Target/BPF/BPFISelLowering.h
+++ b/llvm/lib/Target/BPF/BPFISelLowering.h
@@ -55,10 +55,12 @@ class BPFTargetLowering : public TargetLowering {
EVT VT) const override;
// Exception handling support.
- Register getExceptionPointerRegister(const Constant *) const override {
+ Register getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *) const override {
return BPF::R0;
}
- Register getExceptionSelectorRegister(const Constant *) const override {
+ Register getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *) const override {
return BPF::R0;
}
diff --git a/llvm/lib/Target/CSKY/CSKYISelLowering.cpp b/llvm/lib/Target/CSKY/CSKYISelLowering.cpp
index 1bc3d5ca4431e..8b0bb2e28ad19 100644
--- a/llvm/lib/Target/CSKY/CSKYISelLowering.cpp
+++ b/llvm/lib/Target/CSKY/CSKYISelLowering.cpp
@@ -1225,12 +1225,12 @@ SDValue CSKYTargetLowering::LowerRETURNADDR(SDValue Op,
}
Register CSKYTargetLowering::getExceptionPointerRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
return CSKY::R0;
}
Register CSKYTargetLowering::getExceptionSelectorRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
return CSKY::R1;
}
diff --git a/llvm/lib/Target/CSKY/CSKYISelLowering.h b/llvm/lib/Target/CSKY/CSKYISelLowering.h
index 94b63939fc0c3..ecd2ad96ae179 100644
--- a/llvm/lib/Target/CSKY/CSKYISelLowering.h
+++ b/llvm/lib/Target/CSKY/CSKYISelLowering.h
@@ -57,12 +57,14 @@ class CSKYTargetLowering : public TargetLowering {
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override;
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override;
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
bool isSelectSupported(SelectSupportKind Kind) const override {
// CSKY does not support scalar condition selects on vectors.
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.h b/llvm/lib/Target/Hexagon/HexagonISelLowering.h
index 8e7d31b20a892..c94270eabb264 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.h
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.h
@@ -186,14 +186,16 @@ class HexagonTargetLowering : public TargetLowering {
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override {
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override {
return Hexagon::R0;
}
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override {
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override {
return Hexagon::R1;
}
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 3b57a338b86f2..92e1feb07ae50 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -11154,12 +11154,12 @@ bool LoongArchTargetLowering::isFMAFasterThanFMulAndFAdd(
}
Register LoongArchTargetLowering::getExceptionPointerRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
return LoongArch::R4;
}
Register LoongArchTargetLowering::getExceptionSelectorRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
return LoongArch::R5;
}
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index b30bdeef1812c..7c3ae7d6aac14 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -88,10 +88,12 @@ class LoongArchTargetLowering : public TargetLowering {
EVT VT) const override;
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override;
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override;
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
bool isFsqrtCheap(SDValue Operand, SelectionDAG &DAG) const override {
return true;
diff --git a/llvm/lib/Target/M68k/M68kISelLowering.cpp b/llvm/lib/Target/M68k/M68kISelLowering.cpp
index d167e7f6597b6..03896ac280695 100644
--- a/llvm/lib/Target/M68k/M68kISelLowering.cpp
+++ b/llvm/lib/Target/M68k/M68kISelLowering.cpp
@@ -198,12 +198,14 @@ M68kTargetLowering::shouldExpandAtomicRMWInIR(const AtomicRMWInst *RMW) const {
}
Register
-M68kTargetLowering::getExceptionPointerRegister(const Constant *) const {
+M68kTargetLowering::getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *) const {
return M68k::D0;
}
Register
-M68kTargetLowering::getExceptionSelectorRegister(const Constant *) const {
+M68kTargetLowering::getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *) const {
return M68k::D1;
}
diff --git a/llvm/lib/Target/M68k/M68kISelLowering.h b/llvm/lib/Target/M68k/M68kISelLowering.h
index cbb5c92f49b4c..e4a92754606a0 100644
--- a/llvm/lib/Target/M68k/M68kISelLowering.h
+++ b/llvm/lib/Target/M68k/M68kISelLowering.h
@@ -107,12 +107,14 @@ class M68kTargetLowering : public TargetLowering {
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override;
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override;
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
InlineAsm::ConstraintCode
getInlineAsmMemConstraint(StringRef ConstraintCode) const override;
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.h b/llvm/lib/Target/Mips/MipsISelLowering.h
index 93d90f23b362e..68272cb403b36 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.h
+++ b/llvm/lib/Target/Mips/MipsISelLowering.h
@@ -144,14 +144,16 @@ using TargetRegisterClass = MCRegisterClass;
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override {
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override {
return ABI.IsN64() ? Mips::A0_64 : Mips::A0;
}
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override {
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override {
return ABI.IsN64() ? Mips::A1_64 : Mips::A1;
}
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index e3d74eb389d15..d599bba54079b 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -19696,12 +19696,12 @@ PPCTargetLowering::getScratchRegisters(CallingConv::ID) const {
}
Register PPCTargetLowering::getExceptionPointerRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
return Subtarget.isPPC64() ? PPC::X3 : PPC::R3;
}
Register PPCTargetLowering::getExceptionSelectorRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
return Subtarget.isPPC64() ? PPC::X4 : PPC::R4;
}
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index a39f7e0d3c35f..ee1277eab14ee 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -556,12 +556,14 @@ namespace llvm {
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override;
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override;
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
/// Override to support customized stack guard loading.
bool useLoadStackGuardNode(const Module &M) const override;
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 03c000b86b2e6..9affe23298969 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -27641,12 +27641,12 @@ ISD::NodeType RISCVTargetLowering::getExtendForAtomicRMWArg(unsigned Op) const {
}
Register RISCVTargetLowering::getExceptionPointerRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
return RISCV::X10;
}
Register RISCVTargetLowering::getExceptionSelectorRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
return RISCV::X11;
}
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h b/llvm/lib/Target/RISCV/RISCVISelLowering.h
index 972cc256a3386..929bcc91c83ac 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.h
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h
@@ -273,12 +273,14 @@ class RISCVTargetLowering : public TargetLowering {
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override;
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override;
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
bool shouldExtendTypeInLibCall(EVT Type) const override;
bool shouldSignExtendTypeInLibCall(Type *Ty, bool IsSigned) const override;
diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.h b/llvm/lib/Target/Sparc/SparcISelLowering.h
index 5098480e192a6..b685b9ea9243e 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.h
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.h
@@ -64,14 +64,16 @@ namespace llvm {
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override {
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override {
return SP::I0;
}
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override {
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override {
return SP::I1;
}
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 710832525426b..3773f550eab1f 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -1777,12 +1777,12 @@ SystemZTargetLowering::getRegisterByName(const char *RegName, LLT VT,
}
Register SystemZTargetLowering::getExceptionPointerRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
return Subtarget.isTargetXPLINK64() ? SystemZ::R1D : SystemZ::R6D;
}
Register SystemZTargetLowering::getExceptionSelectorRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
return Subtarget.isTargetXPLINK64() ? SystemZ::R2D : SystemZ::R7D;
}
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.h b/llvm/lib/Target/SystemZ/SystemZISelLowering.h
index e6da481353497..f01f7dcc6ab1d 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.h
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.h
@@ -226,12 +226,14 @@ class SystemZTargetLowering : public TargetLowering {
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override;
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override;
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
/// Override to support customized stack guard loading.
bool useLoadStackGuardNode(const Module &M) const override { return true; }
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 27fd406e5d85d..c6e1051f0bd8e 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -28843,7 +28843,7 @@ SDValue X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op,
}
Register X86TargetLowering::getExceptionPointerRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
if (classifyEHPersonality(PersonalityFn) == EHPersonality::CoreCLR)
return Subtarget.isTarget64BitLP64() ? X86::RDX : X86::EDX;
@@ -28851,7 +28851,7 @@ Register X86TargetLowering::getExceptionPointerRegister(
}
Register X86TargetLowering::getExceptionSelectorRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
// Funclet personalities don't use selectors (the runtime does the selection).
if (isFuncletEHPersonality(classifyEHPersonality(PersonalityFn)))
return X86::NoRegister;
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index a4b4e6f32591b..836997e1a45e8 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -621,12 +621,14 @@ namespace llvm {
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override;
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override;
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
bool needsFixedCatchObjects() const override;
diff --git a/llvm/lib/Target/XCore/XCoreFrameLowering.cpp b/llvm/lib/Target/XCore/XCoreFrameLowering.cpp
index 351a221c92ebd..ce1875ee3be77 100644
--- a/llvm/lib/Target/XCore/XCoreFrameLowering.cpp
+++ b/llvm/lib/Target/XCore/XCoreFrameLowering.cpp
@@ -161,12 +161,13 @@ static void GetEHSpillList(SmallVectorImpl<StackSlotInfo> &SpillList,
const TargetLowering *TL) {
assert(XFI->hasEHSpillSlot() && "There are no EH register spill slots");
const int *EHSlot = XFI->getEHSpillSlot();
+ ExceptionHandling EH = TL->getTargetMachine().getExceptionModel();
SpillList.push_back(
StackSlotInfo(EHSlot[0], MFI.getObjectOffset(EHSlot[0]),
- TL->getExceptionPointerRegister(PersonalityFn)));
+ TL->getExceptionPointerRegister(EH, PersonalityFn)));
SpillList.push_back(
StackSlotInfo(EHSlot[0], MFI.getObjectOffset(EHSlot[1]),
- TL->getExceptionSelectorRegister(PersonalityFn)));
+ TL->getExceptionSelectorRegister(EH, PersonalityFn)));
llvm::sort(SpillList, CompareSSIOffset);
}
diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.h b/llvm/lib/Target/XCore/XCoreISelLowering.h
index bad6588cad740..c41c18fe2c07a 100644
--- a/llvm/lib/Target/XCore/XCoreISelLowering.h
+++ b/llvm/lib/Target/XCore/XCoreISelLowering.h
@@ -61,14 +61,16 @@ namespace llvm {
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override {
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override {
return XCore::R0;
}
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override {
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override {
return XCore::R1;
}
diff --git a/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp b/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
index 0fa9eea5af86c..59e356da1fdc8 100644
--- a/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
@@ -272,12 +272,12 @@ XtensaTargetLowering::XtensaTargetLowering(const TargetMachine &TM,
}
Register XtensaTargetLowering::getExceptionPointerRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
return Xtensa::A2;
}
Register XtensaTargetLowering::getExceptionSelectorRegister(
- const Constant *PersonalityFn) const {
+ ExceptionHandling EH, const Constant *PersonalityFn) const {
return Xtensa::A3;
}
diff --git a/llvm/lib/Target/Xtensa/XtensaISelLowering.h b/llvm/lib/Target/Xtensa/XtensaISelLowering.h
index 0d455919cb407..f62cf70a6fbb1 100644
--- a/llvm/lib/Target/Xtensa/XtensaISelLowering.h
+++ b/llvm/lib/Target/Xtensa/XtensaISelLowering.h
@@ -42,10 +42,12 @@ class XtensaTargetLowering : public TargetLowering {
}
Register
- getExceptionPointerRegister(const Constant *PersonalityFn) const override;
+ getExceptionPointerRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
Register
- getExceptionSelectorRegister(const Constant *PersonalityFn) const override;
+ getExceptionSelectorRegister(ExceptionHandling EH,
+ const Constant *PersonalityFn) const override;
bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
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