[llvm] [AArch64][Atomics] Add test file for testing <1xTy> store atomics (PR #216028)
Kieran B via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 13 05:31:20 PDT 2026
https://github.com/kieroxide created https://github.com/llvm/llvm-project/pull/216028
Currently, there existing no testing for <1xTy> store atomic.
These used to throw a widening legalization error but was fixed due to this [PR](https://github.com/llvm/llvm-project/pull/197618)
Add these tests for AArch64 to ensure regression does not occur.
>From e7e72a38c60bb0403d7949b1c70be781cc0b1911 Mon Sep 17 00:00:00 2001
From: Kieran Bailey <kieran.bailey at arm.com>
Date: Thu, 13 Aug 2026 12:02:19 +0000
Subject: [PATCH] [AArch64][Atomics] Add test file for testing <1xTy> store
atomics
Currently, there existing no testing for <1xTy> store atomics.
Add these tests to ensure regression does not occur.
---
.../CodeGen/AArch64/atomic-vector-store.ll | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 llvm/test/CodeGen/AArch64/atomic-vector-store.ll
diff --git a/llvm/test/CodeGen/AArch64/atomic-vector-store.ll b/llvm/test/CodeGen/AArch64/atomic-vector-store.ll
new file mode 100644
index 0000000000000..f57993ae24e96
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/atomic-vector-store.ll
@@ -0,0 +1,46 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs %s -global-isel=0 | FileCheck %s --check-prefixes=CHECK,CHECK-SD
+; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs %s -global-isel=1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
+
+define void @test_store_release_v1i8(ptr %ptr, <1 x i8> %data) nounwind {
+; CHECK-LABEL: test_store_release_v1i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-NEXT: umov w8, v0.b[0]
+; CHECK-NEXT: stlrb w8, [x0]
+; CHECK-NEXT: ret
+ store atomic <1 x i8> %data, ptr %ptr release, align 1
+ ret void
+}
+
+define void @test_store_release_v1i16(ptr %ptr, <1 x i16> %data) nounwind {
+; CHECK-SD-LABEL: test_store_release_v1i16:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-SD-NEXT: umov w8, v0.h[0]
+; CHECK-SD-NEXT: strh w8, [x0]
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: test_store_release_v1i16:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: str h0, [x0]
+; CHECK-GI-NEXT: ret
+ store atomic <1 x i16> %data, ptr %ptr monotonic, align 2
+ ret void
+}
+
+define void @test_store_release_v1i32(ptr %ptr, <1 x i32> %data) nounwind {
+; CHECK-SD-LABEL: test_store_release_v1i32:
+; CHECK-SD: // %bb.0:
+; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
+; CHECK-SD-NEXT: fmov w8, s0
+; CHECK-SD-NEXT: str w8, [x0]
+; CHECK-SD-NEXT: ret
+;
+; CHECK-GI-LABEL: test_store_release_v1i32:
+; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: str s0, [x0]
+; CHECK-GI-NEXT: ret
+ store atomic <1 x i32> %data, ptr %ptr unordered, align 4
+ ret void
+}
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