[llvm] [Xtensa] Fix FP register scavenging. (PR #215984)

[Andrei Safronov via llvm-commits]

https://github.com/andreisfr created https://github.com/llvm/llvm-project/pull/215984

None

>From 69a38470bfd0e220bdcd141ace2765ddf0194a4b Mon Sep 17 00:00:00 2001
From: Andrei Safronov <safronov at espressif.com>
Date: Mon, 10 Aug 2026 11:17:29 +0300
Subject: [PATCH] [Xtensa] Fix FP register scavenging.

---
 llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp b/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
index 1c0dc66a46144..0c090f04e2508 100644
--- a/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp
@@ -368,7 +368,7 @@ void XtensaFrameLowering::processFunctionBeforeFrameFinalized(
   auto *XtensaFI = MF.getInfo<XtensaMachineFunctionInfo>();
   unsigned ScavSlotsNum = 0;
 
-  if (!isInt<12>(MaxSPOffset))
+  if (!isInt<12>(MaxSPOffset) || hasFP(MF))
     ScavSlotsNum = 1;
 
   // Far branches over 18-bit offset require a spill slot for scratch register.