[llvm] [AMDGPU] Size the skipped-argument bitvector by IR argument count (PR #215970)

[Arseniy Obolenskiy via llvm-commits]

https://github.com/aobolensk created https://github.com/llvm/llvm-project/pull/215970

Skipped was sized by Ins.size() but indexed by IR argument index, zero-sized argument produces no InputArg, causing an out-of-bounds BitVector access for later arguments

>From 9b943068068401234226517a0272685177a3f520 Mon Sep 17 00:00:00 2001
From: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: Thu, 13 Aug 2026 08:35:00 +0200
Subject: [PATCH] [AMDGPU] Size the skipped-argument bitvector by IR argument
 count

Skipped was sized by Ins.size() but indexed by IR argument index, zero-sized argument produces no InputArg, causing an out-of-bounds BitVector access for later arguments
---
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp |  2 +-
 llvm/test/CodeGen/AMDGPU/function-args.ll | 22 ++++++++++++++++++++++
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 08fbc76d62275..6cbf4833fe66f 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -3475,7 +3475,7 @@ SDValue SITargetLowering::LowerFormalArguments(
 
   SmallVector<ISD::InputArg, 16> Splits;
   SmallVector<CCValAssign, 16> ArgLocs;
-  BitVector Skipped(Ins.size());
+  BitVector Skipped(Fn.arg_size());
   CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,
                  *DAG.getContext());
 
diff --git a/llvm/test/CodeGen/AMDGPU/function-args.ll b/llvm/test/CodeGen/AMDGPU/function-args.ll
index 1a2a47330e16c..26f91183948ad 100644
--- a/llvm/test/CodeGen/AMDGPU/function-args.ll
+++ b/llvm/test/CodeGen/AMDGPU/function-args.ll
@@ -4431,4 +4431,26 @@ define void @void_func_v16bf16(<16 x bfloat> %arg0) #0 {
   ret void
 }
 
+; A zero-sized argument produces no InputArg, so later args must still lower correctly.
+define void @void_func_empty_struct_i32({} %arg0, i32 %arg1) #0 {
+; CIGFX89-LABEL: void_func_empty_struct_i32:
+; CIGFX89:       ; %bb.0:
+; CIGFX89-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; CIGFX89-NEXT:    s_mov_b32 s7, 0xf000
+; CIGFX89-NEXT:    s_mov_b32 s6, -1
+; CIGFX89-NEXT:    buffer_store_dword v0, off, s[4:7], 0
+; CIGFX89-NEXT:    s_waitcnt vmcnt(0)
+; CIGFX89-NEXT:    s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: void_func_empty_struct_i32:
+; GFX11:       ; %bb.0:
+; GFX11-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT:    s_mov_b32 s3, 0x31016000
+; GFX11-NEXT:    s_mov_b32 s2, -1
+; GFX11-NEXT:    buffer_store_b32 v0, off, s[0:3], 0
+; GFX11-NEXT:    s_setpc_b64 s[30:31]
+  store i32 %arg1, ptr addrspace(1) poison
+  ret void
+}
+
 attributes #0 = { nounwind }