[llvm] 6651a11 - [Lanai] Default to NewPM

via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 12 23:00:07 PDT 2026 

Author: Aiden Grossman
Date: 2026-08-12T23:00:03-07:00
New Revision: 6651a116b6f5ab6e9812be29b33e1fa6bdaaf76c

URL: https://github.com/llvm/llvm-project/commit/6651a116b6f5ab6e9812be29b33e1fa6bdaaf76c
DIFF: https://github.com/llvm/llvm-project/commit/6651a116b6f5ab6e9812be29b33e1fa6bdaaf76c.diff

LOG: [Lanai] Default to NewPM

Lanai should be fully functional with the NewPM, so try defaulting to
it. Also remove the now duplicate test coverage.

Setting this flag makes both clang and llc default to the NewPM.

Reviewers: jpienaar

Pull Request: https://github.com/llvm/llvm-project/pull/214574

Added: 
    

Modified: 
    llvm/lib/Target/Lanai/LanaiTargetMachine.h
    llvm/test/CodeGen/Lanai/atomic-oversize.ll
    llvm/test/CodeGen/Lanai/codemodel.ll
    llvm/test/CodeGen/Lanai/comparisons_i32.ll
    llvm/test/CodeGen/Lanai/comparisons_i64.ll
    llvm/test/CodeGen/Lanai/constant_multiply.ll
    llvm/test/CodeGen/Lanai/delay_filler.ll
    llvm/test/CodeGen/Lanai/i32.ll
    llvm/test/CodeGen/Lanai/inlineasm-output-template.ll
    llvm/test/CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
    llvm/test/CodeGen/Lanai/lowering-128.ll
    llvm/test/CodeGen/Lanai/lshift64.ll
    llvm/test/CodeGen/Lanai/machine-verifier-regression.ll
    llvm/test/CodeGen/Lanai/masking_setccs.ll
    llvm/test/CodeGen/Lanai/mem_alu_combiner.ll
    llvm/test/CodeGen/Lanai/multiply.ll
    llvm/test/CodeGen/Lanai/naked-fn-with-frame-pointer.ll
    llvm/test/CodeGen/Lanai/peephole-compare.mir
    llvm/test/CodeGen/Lanai/rshift64.ll
    llvm/test/CodeGen/Lanai/select.ll
    llvm/test/CodeGen/Lanai/set_and_hi.ll
    llvm/test/CodeGen/Lanai/shift.ll
    llvm/test/CodeGen/Lanai/stack-frame.ll
    llvm/test/CodeGen/Lanai/sub-cmp-peephole.ll
    llvm/test/CodeGen/Lanai/subword.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Lanai/LanaiTargetMachine.h b/llvm/lib/Target/Lanai/LanaiTargetMachine.h
index 9f6dcd2d74d49..22313a2ed7dd1 100644
--- a/llvm/lib/Target/Lanai/LanaiTargetMachine.h
+++ b/llvm/lib/Target/Lanai/LanaiTargetMachine.h
@@ -59,6 +59,8 @@ class LanaiTargetMachine : public CodeGenTargetMachineImpl {
                              CodeGenFileType FileType,
                              const CGPassBuilderOption &Opt, MCContext &Ctx,
                              PassInstrumentationCallbacks *PIC) override;
+
+  bool shouldDefaultToNewPM() const override { return true; }
 };
 } // namespace llvm
 

diff  --git a/llvm/test/CodeGen/Lanai/atomic-oversize.ll b/llvm/test/CodeGen/Lanai/atomic-oversize.ll
index f8d336737ee96..93307ac8184d0 100644
--- a/llvm/test/CodeGen/Lanai/atomic-oversize.ll
+++ b/llvm/test/CodeGen/Lanai/atomic-oversize.ll
@@ -1,5 +1,4 @@
 ; RUN: llc -mtriple=lanai < %s | FileCheck %s
-; RUN: llc -enable-new-pm -mtriple=lanai < %s | FileCheck %s
 
 ; Native atomics are unsupported, so all are oversize.
 define void @test(ptr %a) nounwind {

diff  --git a/llvm/test/CodeGen/Lanai/codemodel.ll b/llvm/test/CodeGen/Lanai/codemodel.ll
index 11d767f276f8a..75559c99bb80e 100644
--- a/llvm/test/CodeGen/Lanai/codemodel.ll
+++ b/llvm/test/CodeGen/Lanai/codemodel.ll
@@ -1,11 +1,7 @@
 ; RUN: llc -mtriple=lanai < %s | FileCheck %s
-; RUN: llc -enable-new-pm -mtriple=lanai < %s | FileCheck %s
 ; RUN: llc -mtriple=lanai < %s -code-model=small  | FileCheck -check-prefix CHECK-SMALL %s
-; RUN: llc -enable-new-pm -mtriple=lanai < %s -code-model=small  | FileCheck -check-prefix CHECK-SMALL %s
 ; RUN: not llc -mtriple=lanai < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s
-; RUN: not llc -enable-new-pm -mtriple=lanai < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s
 ; RUN: not llc -mtriple=lanai < %s -code-model=kernel 2>&1 | FileCheck -check-prefix CHECK-KERNEL %s
-; RUN: not llc -enable-new-pm -mtriple=lanai < %s -code-model=kernel 2>&1 | FileCheck -check-prefix CHECK-KERNEL %s
 
 ; CHECK-TINY: Target does not support the tiny CodeModel
 ; CHECK-KERNEL: Target does not support the kernel CodeModel

diff  --git a/llvm/test/CodeGen/Lanai/comparisons_i32.ll b/llvm/test/CodeGen/Lanai/comparisons_i32.ll
index 7169a8239001b..fd8ca725c4cb6 100644
--- a/llvm/test/CodeGen/Lanai/comparisons_i32.ll
+++ b/llvm/test/CodeGen/Lanai/comparisons_i32.ll
@@ -1,5 +1,4 @@
 ; RUN: llc < %s | FileCheck %s
-; RUN: llc -enable-new-pm < %s | FileCheck %s
 
 ; Test that basic 32-bit integer comparison operations assemble as expected.
 

diff  --git a/llvm/test/CodeGen/Lanai/comparisons_i64.ll b/llvm/test/CodeGen/Lanai/comparisons_i64.ll
index 6e4e398c0ffe4..fd40e3d120d21 100644
--- a/llvm/test/CodeGen/Lanai/comparisons_i64.ll
+++ b/llvm/test/CodeGen/Lanai/comparisons_i64.ll
@@ -1,5 +1,4 @@
 ; RUN: llc < %s | FileCheck %s
-; RUN: llc -enable-new-pm < %s | FileCheck %s
 
 ; Test that basic 64-bit integer comparison operations assemble as expected.
 

diff  --git a/llvm/test/CodeGen/Lanai/constant_multiply.ll b/llvm/test/CodeGen/Lanai/constant_multiply.ll
index d0a6e7c626512..cd877f79c2dd9 100644
--- a/llvm/test/CodeGen/Lanai/constant_multiply.ll
+++ b/llvm/test/CodeGen/Lanai/constant_multiply.ll
@@ -1,6 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s | FileCheck %s
-; RUN: llc -enable-new-pm < %s | FileCheck %s
 
 ; Test custom lowering for 32-bit integer multiplication.
 

diff  --git a/llvm/test/CodeGen/Lanai/delay_filler.ll b/llvm/test/CodeGen/Lanai/delay_filler.ll
index bee07627e5122..4c02b486dab99 100644
--- a/llvm/test/CodeGen/Lanai/delay_filler.ll
+++ b/llvm/test/CodeGen/Lanai/delay_filler.ll
@@ -1,9 +1,6 @@
 ; RUN: llc < %s | FileCheck %s
-; RUN: llc -enable-new-pm < %s | FileCheck %s
 ; RUN: llc --lanai-nop-delay-filler < %s | \
 ; RUN:   FileCheck %s --check-prefix=NOP
-; RUN: llc -enable-new-pm --lanai-nop-delay-filler < %s | \
-; RUN:   FileCheck %s --check-prefix=NOP
 
 ; The delay slot after 'bt f' cannot be filled with the 'or' instruction
 ; because that instruction defines %r6 which is used as an argument by the

diff  --git a/llvm/test/CodeGen/Lanai/i32.ll b/llvm/test/CodeGen/Lanai/i32.ll
index 733ced54f8400..a8a588ccbf506 100644
--- a/llvm/test/CodeGen/Lanai/i32.ll
+++ b/llvm/test/CodeGen/Lanai/i32.ll
@@ -1,5 +1,4 @@
 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
-; RUN: llc -enable-new-pm < %s -asm-verbose=false | FileCheck %s
 
 ; Test that basic 32-bit integer operations assemble as expected.
 

diff  --git a/llvm/test/CodeGen/Lanai/inlineasm-output-template.ll b/llvm/test/CodeGen/Lanai/inlineasm-output-template.ll
index b11255380b166..d588ea13e75cc 100644
--- a/llvm/test/CodeGen/Lanai/inlineasm-output-template.ll
+++ b/llvm/test/CodeGen/Lanai/inlineasm-output-template.ll
@@ -1,5 +1,4 @@
 ; RUN: llc -mtriple=lanai-linux-gnueabi < %s | FileCheck %s
-; RUN: llc -enable-new-pm -mtriple=lanai-linux-gnueabi < %s | FileCheck %s
 
 ; Test that %c works with immediates
 ; CHECK-LABEL: test_inlineasm_c_output_template0

diff  --git a/llvm/test/CodeGen/Lanai/lanai-misched-trivial-disjoint.ll b/llvm/test/CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
index f30ae170bb004..49008f8449716 100644
--- a/llvm/test/CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
+++ b/llvm/test/CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
@@ -1,6 +1,5 @@
 ; REQUIRES: asserts
 ; RUN: llc %s -mtriple=lanai-unknown-unknown -debug-only=machine-scheduler -o /dev/null 2>&1 | FileCheck %s
-; RUN: llc %s -enable-new-pm -mtriple=lanai-unknown-unknown -debug-only=machine-scheduler -o /dev/null 2>&1 | FileCheck %s
 
 ; Make sure there are no control dependencies between memory operations that
 ; are trivially disjoint.

diff  --git a/llvm/test/CodeGen/Lanai/lowering-128.ll b/llvm/test/CodeGen/Lanai/lowering-128.ll
index 8b7113af89c98..85a859cb6f181 100644
--- a/llvm/test/CodeGen/Lanai/lowering-128.ll
+++ b/llvm/test/CodeGen/Lanai/lowering-128.ll
@@ -1,5 +1,4 @@
 ; RUN: llc < %s | FileCheck %s
-; RUN: llc -enable-new-pm < %s | FileCheck %s
 
 ; Tests that lowering wide registers (128 bits or more) works on Lanai.
 ; The emitted assembly is not checked, we just do a smoketest.

diff  --git a/llvm/test/CodeGen/Lanai/lshift64.ll b/llvm/test/CodeGen/Lanai/lshift64.ll
index bee435e44cb22..6a55d235e0998 100644
--- a/llvm/test/CodeGen/Lanai/lshift64.ll
+++ b/llvm/test/CodeGen/Lanai/lshift64.ll
@@ -1,5 +1,4 @@
 ; RUN: llc < %s -mtriple=lanai-unknown-unknown | FileCheck %s
-; RUN: llc -enable-new-pm < %s -mtriple=lanai-unknown-unknown | FileCheck %s
 
 ; Test left-shift i64 lowering does not result in call being inserted.
 

diff  --git a/llvm/test/CodeGen/Lanai/machine-verifier-regression.ll b/llvm/test/CodeGen/Lanai/machine-verifier-regression.ll
index bde0d1ef36de1..29e2cd0392c58 100644
--- a/llvm/test/CodeGen/Lanai/machine-verifier-regression.ll
+++ b/llvm/test/CodeGen/Lanai/machine-verifier-regression.ll
@@ -1,6 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
 ; RUN: llc -mtriple=lanai -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -enable-new-pm -mtriple=lanai < %s | FileCheck %s
 
 define i32 @regression1(i32 inreg %a) #0 {
 ; CHECK-LABEL: regression1:

diff  --git a/llvm/test/CodeGen/Lanai/masking_setccs.ll b/llvm/test/CodeGen/Lanai/masking_setccs.ll
index f94052fbe8226..48136fd425743 100644
--- a/llvm/test/CodeGen/Lanai/masking_setccs.ll
+++ b/llvm/test/CodeGen/Lanai/masking_setccs.ll
@@ -1,5 +1,4 @@
 ; RUN: llc < %s | FileCheck %s
-; RUN: llc -enable-new-pm < %s | FileCheck %s
 
 ; Test that unnecessary masking with 0x1 is not inserted.
 

diff  --git a/llvm/test/CodeGen/Lanai/mem_alu_combiner.ll b/llvm/test/CodeGen/Lanai/mem_alu_combiner.ll
index 572fcdac23bd6..a36742b50746c 100644
--- a/llvm/test/CodeGen/Lanai/mem_alu_combiner.ll
+++ b/llvm/test/CodeGen/Lanai/mem_alu_combiner.ll
@@ -1,9 +1,6 @@
 ; RUN: llc < %s -mtriple=lanai | FileCheck %s
-; RUN: llc -enable-new-pm < %s -mtriple=lanai | FileCheck %s
 ; RUN: llc < %s -mtriple=lanai -disable-lanai-mem-alu-combiner | \
 ; RUN:   FileCheck %s -check-prefix=CHECK-DIS
-; RUN: llc < %s -enable-new-pm -mtriple=lanai -disable-lanai-mem-alu-combiner | \
-; RUN:   FileCheck %s -check-prefix=CHECK-DIS
 
 ; CHECK-LABEL: sum,
 ; CHECK: ld [%r{{[0-9]+}}++], %r{{[0-9]+}}{{$}}

diff  --git a/llvm/test/CodeGen/Lanai/multiply.ll b/llvm/test/CodeGen/Lanai/multiply.ll
index 3b0d7dcec577c..f0e73dd4d024b 100644
--- a/llvm/test/CodeGen/Lanai/multiply.ll
+++ b/llvm/test/CodeGen/Lanai/multiply.ll
@@ -1,6 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
 ; RUN: llc -mtriple=lanai < %s | FileCheck %s
-; RUN: llc -enable-new-pm -mtriple=lanai < %s | FileCheck %s
 
 ; Test the in place lowering of mul i32.
 

diff  --git a/llvm/test/CodeGen/Lanai/naked-fn-with-frame-pointer.ll b/llvm/test/CodeGen/Lanai/naked-fn-with-frame-pointer.ll
index 3918ff810c5ce..43ad9e8754686 100644
--- a/llvm/test/CodeGen/Lanai/naked-fn-with-frame-pointer.ll
+++ b/llvm/test/CodeGen/Lanai/naked-fn-with-frame-pointer.ll
@@ -1,5 +1,4 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple lanai | FileCheck %s -check-prefixes=CHECK
 ; RUN: llc < %s -mtriple lanai | FileCheck %s
 
 declare dso_local void @main()

diff  --git a/llvm/test/CodeGen/Lanai/peephole-compare.mir b/llvm/test/CodeGen/Lanai/peephole-compare.mir
index 04274a2d1efd9..7bb13811f3e55 100644
--- a/llvm/test/CodeGen/Lanai/peephole-compare.mir
+++ b/llvm/test/CodeGen/Lanai/peephole-compare.mir
@@ -1,4 +1,3 @@
-# RUN: llc -run-pass=peephole-opt %s -o - | FileCheck %s
 # RUN: llc -passes=peephole-opt %s -o - | FileCheck %s
 
 # Test the compare fold peephole.

diff  --git a/llvm/test/CodeGen/Lanai/rshift64.ll b/llvm/test/CodeGen/Lanai/rshift64.ll
index 0e1558b6be053..2009edd001c8d 100644
--- a/llvm/test/CodeGen/Lanai/rshift64.ll
+++ b/llvm/test/CodeGen/Lanai/rshift64.ll
@@ -1,5 +1,4 @@
 ; RUN: llc < %s -mtriple=lanai-unknown-unknown | FileCheck %s
-; RUN: llc -enable-new-pm < %s -mtriple=lanai-unknown-unknown | FileCheck %s
 
 ; Test right-shift i64 lowering does not result in call being inserted.
 

diff  --git a/llvm/test/CodeGen/Lanai/select.ll b/llvm/test/CodeGen/Lanai/select.ll
index 03f4f8b9c9c49..0c5b2307ab2cd 100644
--- a/llvm/test/CodeGen/Lanai/select.ll
+++ b/llvm/test/CodeGen/Lanai/select.ll
@@ -1,5 +1,4 @@
 ; RUN: llc < %s | FileCheck %s
-; RUN: llc -enable-new-pm < %s | FileCheck %s
 
 ; Test that Lanai select instruction is selected from LLVM select instruction.
 

diff  --git a/llvm/test/CodeGen/Lanai/set_and_hi.ll b/llvm/test/CodeGen/Lanai/set_and_hi.ll
index 9299705761fd4..2eee7517318ed 100644
--- a/llvm/test/CodeGen/Lanai/set_and_hi.ll
+++ b/llvm/test/CodeGen/Lanai/set_and_hi.ll
@@ -1,5 +1,4 @@
 ; RUN: llc < %s | FileCheck %s
-; RUN: llc -enable-new-pm < %s | FileCheck %s
 
 ; Test matching of and_hi.
 

diff  --git a/llvm/test/CodeGen/Lanai/shift.ll b/llvm/test/CodeGen/Lanai/shift.ll
index 875d2388eb998..5bf2d63d07b1e 100644
--- a/llvm/test/CodeGen/Lanai/shift.ll
+++ b/llvm/test/CodeGen/Lanai/shift.ll
@@ -1,5 +1,4 @@
 ; RUN: llc < %s -mtriple=lanai | FileCheck %s
-; RUN: llc < %s -mtriple=lanai | FileCheck %s
 
 ; Test lowering of shifts.
 

diff  --git a/llvm/test/CodeGen/Lanai/stack-frame.ll b/llvm/test/CodeGen/Lanai/stack-frame.ll
index 23724184010f1..3564658fa0fd5 100644
--- a/llvm/test/CodeGen/Lanai/stack-frame.ll
+++ b/llvm/test/CodeGen/Lanai/stack-frame.ll
@@ -1,5 +1,4 @@
 ; RUN: llc -mtriple=lanai < %s -o - | FileCheck %s
-; RUN: llc -enable-new-pm -mtriple=lanai < %s -o - | FileCheck %s
 
 define void @f1() {
 	%c = alloca i8, align 1

diff  --git a/llvm/test/CodeGen/Lanai/sub-cmp-peephole.ll b/llvm/test/CodeGen/Lanai/sub-cmp-peephole.ll
index 6941b81f93ffd..047484653d8dc 100644
--- a/llvm/test/CodeGen/Lanai/sub-cmp-peephole.ll
+++ b/llvm/test/CodeGen/Lanai/sub-cmp-peephole.ll
@@ -1,6 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=lanai | FileCheck %s
-; RUN: llc < %s -mtriple=lanai | FileCheck %s
 
 define i32 @f(i32 inreg %a, i32 inreg %b) nounwind ssp {
 ; CHECK-LABEL: f:

diff  --git a/llvm/test/CodeGen/Lanai/subword.ll b/llvm/test/CodeGen/Lanai/subword.ll
index d3b73eb1970aa..6da3b5dfefecf 100644
--- a/llvm/test/CodeGen/Lanai/subword.ll
+++ b/llvm/test/CodeGen/Lanai/subword.ll
@@ -1,5 +1,4 @@
 ; RUN: llc < %s -mtriple=lanai-unknown-unknown | FileCheck %s
-; RUN: llc -enable-new-pm < %s -mtriple=lanai-unknown-unknown | FileCheck %s
 
 ; Test scheduling of subwords.

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