[llvm] [CodeGen] Derive the regalloc pipeline from the allocator, remove -optimize-regalloc (PR #215740)
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 12 20:40:35 PDT 2026
https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/215740
>From 2e2e8dcdb93a7458ce3ddf800f1c8a27976b3dd1 Mon Sep 17 00:00:00 2001
From: Fangrui Song <i at maskray.me>
Date: Tue, 11 Aug 2026 23:36:58 -0700
Subject: [PATCH] [CodeGen] Derive the regalloc pipeline from the allocator,
remove -optimize-regalloc
-regalloc selects the allocator and -optimize-regalloc independently
selects the pipeline, but only two combinations are meaningful: a
non-fast allocator with -optimize-regalloc=0 is a fatal error, and
-regalloc=fast with the optimized pipeline runs the full preparation
just to rewrite a vacuous VirtRegMap.
Derive the pipeline from the allocator instead: an explicit -regalloc
implies its pipeline; the default follows the optimization level.
-regalloc=greedy now works at -O0 and -regalloc=fast always uses the
fast pipeline. Update tests to name the allocator; regenerate three
that checked the hybrid output.
Aided by Fable 5
---
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 13 ++++++---
llvm/lib/CodeGen/TargetPassConfig.cpp | 28 ++++++++-----------
.../ARM/2008-02-04-LocalRegAllocBug.ll | 2 +-
.../CodeGen/ARM/2008-02-29-RegAllocLocal.ll | 2 +-
.../CodeGen/ARM/2010-05-17-FastAllocCrash.ll | 2 +-
.../CodeGen/ARM/2010-05-20-NEONSpillCrash.ll | 2 +-
llvm/test/CodeGen/ARM/divmod-eabi.ll | 14 +++++-----
.../CodeGen/ARM/fast-isel-redefinition.ll | 2 +-
llvm/test/CodeGen/ARM/ldrd.ll | 4 +--
.../Generic/2006-09-02-LocalAllocCrash.ll | 2 +-
.../CodeGen/Generic/edge-bundles-blockIDs.ll | 2 +-
.../LoongArch/inline-asm-clobbers-fcc.mir | 4 ++-
llvm/test/CodeGen/M68k/PR57660.ll | 21 +++++++-------
.../2007-04-30-InlineAsmEarlyClobber.ll | 2 +-
.../PowerPC/2007-10-21-LocalRegAllocAssert.ll | 2 +-
.../2007-10-21-LocalRegAllocAssert2.ll | 2 +-
.../PowerPC/2008-02-09-LocalRegAllocAssert.ll | 2 +-
.../aggressive-anti-dep-breaker-subreg.ll | 2 +-
.../CodeGen/PowerPC/fast-isel-redefinition.ll | 2 +-
.../test/CodeGen/SystemZ/copy-physreg-vr16.ll | 1 +
.../X86/2008-01-16-FPStackifierAssert.ll | 2 +-
.../X86/2008-02-22-LocalRegAllocBug.ll | 2 +-
.../CodeGen/X86/2008-05-21-CoalescerBug.ll | 2 +-
.../X86/2008-05-28-LocalRegAllocBug.ll | 2 +-
.../CodeGen/X86/2008-09-17-inline-asm-1.ll | 2 +-
.../CodeGen/X86/2008-09-18-inline-asm-2.ll | 2 +-
llvm/test/CodeGen/X86/2009-04-24.ll | 2 +-
.../X86/2010-05-06-LocalInlineAsmClobber.ll | 2 +-
.../CodeGen/X86/2010-05-12-FastAllocKills.ll | 2 +-
.../X86/2010-06-15-FastAllocEarlyCLobber.ll | 2 +-
llvm/test/CodeGen/X86/inline-asm-error.ll | 2 +-
llvm/test/CodeGen/X86/inline-asm-tied.ll | 2 +-
.../CodeGen/X86/liveness-local-regalloc.ll | 2 +-
.../CodeGen/X86/phys-reg-local-regalloc.ll | 4 +--
llvm/test/CodeGen/X86/pr11415.ll | 2 +-
35 files changed, 73 insertions(+), 70 deletions(-)
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index b889d673b6312..d347a663ca6da 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -194,10 +194,15 @@ template <typename DerivedT, typename TargetMachineT> class CodeGenPassBuilder {
if (Opt.EnableGlobalISelAbort)
TM.Options.GlobalISelAbort = *Opt.EnableGlobalISelAbort;
- if (Opt.OptimizeRegAlloc == cl::boolOrDefault::BOU_UNSET)
- Opt.OptimizeRegAlloc = getOptLevel() != CodeGenOptLevel::None
- ? cl::boolOrDefault::BOU_TRUE
- : cl::boolOrDefault::BOU_FALSE;
+ // An explicit RegAlloc choice implies its pipeline: only the fast
+ // allocator uses the unoptimized one.
+ if (Opt.OptimizeRegAlloc == cl::boolOrDefault::BOU_UNSET) {
+ bool Optimized = Opt.RegAlloc > RegAllocType::Default
+ ? Opt.RegAlloc != RegAllocType::Fast
+ : getOptLevel() != CodeGenOptLevel::None;
+ Opt.OptimizeRegAlloc =
+ Optimized ? cl::boolOrDefault::BOU_TRUE : cl::boolOrDefault::BOU_FALSE;
+ }
}
Error buildPipeline(ModulePassManager &MPM, ModuleAnalysisManager &MAM,
diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp
index ae0b2e0e86814..ab272382d09e0 100644
--- a/llvm/lib/CodeGen/TargetPassConfig.cpp
+++ b/llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -83,9 +83,6 @@ static cl::opt<bool> DisableMachineLICM("disable-machine-licm", cl::Hidden,
cl::desc("Disable Machine LICM"));
static cl::opt<bool> DisableMachineCSE("disable-machine-cse", cl::Hidden,
cl::desc("Disable Machine Common Subexpression Elimination"));
-static cl::opt<cl::boolOrDefault> OptimizeRegAlloc(
- "optimize-regalloc", cl::Hidden,
- cl::desc("Enable optimized register allocation compilation path."));
static cl::opt<bool> DisablePostRAMachineLICM("disable-postra-machine-licm",
cl::Hidden,
cl::desc("Disable Machine LICM"));
@@ -508,7 +505,6 @@ CGPassBuilderOption llvm::getCGPassBuilderOption() {
#define SET_OPTION(Option) Opt.Option = Option;
- SET_OPTION(OptimizeRegAlloc)
SET_OPTION(EnableFastISelOption)
SET_OPTION(EnableGlobalISelOption)
SET_OPTION(VerifyMachineCode)
@@ -1366,18 +1362,6 @@ void TargetPassConfig::addMachineSSAOptimization() {
/// Register Allocation Pass Configuration
//===---------------------------------------------------------------------===//
-bool TargetPassConfig::getOptimizeRegAlloc() const {
- switch (OptimizeRegAlloc) {
- case cl::boolOrDefault::BOU_UNSET:
- return getOptLevel() != CodeGenOptLevel::None;
- case cl::boolOrDefault::BOU_TRUE:
- return true;
- case cl::boolOrDefault::BOU_FALSE:
- return false;
- }
- llvm_unreachable("Invalid optimize-regalloc state");
-}
-
/// A dummy default pass factory indicates whether the register allocator is
/// overridden on the command line.
static llvm::once_flag InitializeDefaultRegisterAllocatorFlag;
@@ -1392,6 +1376,18 @@ static void initializeDefaultRegisterAllocatorOnce() {
RegisterRegAlloc::setDefault(RegAlloc);
}
+bool TargetPassConfig::getOptimizeRegAlloc() const {
+ // An explicit -regalloc choice implies its pipeline: only the fast
+ // allocator uses the unoptimized one.
+ llvm::call_once(InitializeDefaultRegisterAllocatorFlag,
+ initializeDefaultRegisterAllocatorOnce);
+ RegisterRegAlloc::FunctionPassCtor Ctor = RegisterRegAlloc::getDefault();
+ if (Ctor != (RegisterRegAlloc::FunctionPassCtor)&useDefaultRegisterAllocator)
+ return Ctor !=
+ (RegisterRegAlloc::FunctionPassCtor)&createFastRegisterAllocator;
+ return getOptLevel() != CodeGenOptLevel::None;
+}
+
/// Instantiate the default register allocator pass for this target for either
/// the optimized or unoptimized allocation path. This will be added to the pass
/// manager by addFastRegAlloc in the unoptimized case or addOptimizedRegAlloc
diff --git a/llvm/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll b/llvm/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll
index 4d9b7c6891d72..a0e9643e42960 100644
--- a/llvm/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll
+++ b/llvm/test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=arm-linux-gnueabi -regalloc=fast -optimize-regalloc=0
+; RUN: llc < %s -mtriple=arm-linux-gnueabi -regalloc=fast
; PR1925
%struct.encode_aux_nearestmatch = type { ptr, ptr, ptr, ptr, i32, i32 }
diff --git a/llvm/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll b/llvm/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll
index d22a3e53b3c89..4bcab40cd65b0 100644
--- a/llvm/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll
+++ b/llvm/test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=fast -optimize-regalloc=0
+; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=fast
; PR1925
%"struct.kc::impl_Ccode_option" = type { %"struct.kc::impl_abstract_phylum" }
diff --git a/llvm/test/CodeGen/ARM/2010-05-17-FastAllocCrash.ll b/llvm/test/CodeGen/ARM/2010-05-17-FastAllocCrash.ll
index 7ad9cb18e5de1..dae5d38ce82fe 100644
--- a/llvm/test/CodeGen/ARM/2010-05-17-FastAllocCrash.ll
+++ b/llvm/test/CodeGen/ARM/2010-05-17-FastAllocCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs
+; RUN: llc < %s -regalloc=fast -verify-machineinstrs
target triple = "arm-pc-linux-gnu"
; This test case would accidentally use the same physreg for two virtregs
diff --git a/llvm/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll b/llvm/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll
index 0746ff22085cb..c506a8cfc2df2 100644
--- a/llvm/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll
+++ b/llvm/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=arm-eabi -mattr=+neon -O0 -optimize-regalloc -regalloc=basic %s -o /dev/null
+; RUN: llc -mtriple=arm-eabi -mattr=+neon -O0 -regalloc=basic %s -o /dev/null
; This test would crash the rewriter when trying to handle a spill after one of
; the @llvm.arm.neon.vld3.v8i8.p0 defined three parts of a register.
diff --git a/llvm/test/CodeGen/ARM/divmod-eabi.ll b/llvm/test/CodeGen/ARM/divmod-eabi.ll
index a7bfed7290e2a..3ccd9270b0856 100644
--- a/llvm/test/CodeGen/ARM/divmod-eabi.ll
+++ b/llvm/test/CodeGen/ARM/divmod-eabi.ll
@@ -6,20 +6,20 @@
; Sometimes the checks that the correct registers are used after the libcalls
; are different between optimization levels, so we have to separate them.
; RUN: llc -mtriple armv7-none-eabi %s -o - | FileCheck %s --check-prefix=EABI
-; RUN: llc -mtriple armv7-none-eabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=EABI
+; RUN: llc -mtriple armv7-none-eabi %s -o - -O0 -regalloc=greedy | FileCheck %s --check-prefix=EABI
; RUN: llc -mtriple armv7-none-eabihf %s -o - | FileCheck %s --check-prefix=EABI
-; RUN: llc -mtriple armv7-none-eabihf %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=EABI
+; RUN: llc -mtriple armv7-none-eabihf %s -o - -O0 -regalloc=greedy | FileCheck %s --check-prefix=EABI
; All "eabi" (Bare, GNU and Android) must lower SREM/UREM to __aeabi_{u,i}divmod
; RUN: llc -mtriple armv7-linux-androideabi %s -o - | FileCheck %s --check-prefix=EABI
-; RUN: llc -mtriple armv7-linux-androideabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=EABI
+; RUN: llc -mtriple armv7-linux-androideabi %s -o - -O0 -regalloc=greedy | FileCheck %s --check-prefix=EABI
; RUN: llc -mtriple armv7-linux-gnueabi %s -o - | FileCheck %s --check-prefix=EABI
-; RUN: llc -mtriple armv7-linux-gnueabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=EABI
+; RUN: llc -mtriple armv7-linux-gnueabi %s -o - -O0 -regalloc=greedy | FileCheck %s --check-prefix=EABI
; RUN: llc -mtriple armv7-linux-musleabi %s -o - | FileCheck %s --check-prefix=EABI
-; RUN: llc -mtriple armv7-linux-musleabi %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=EABI
+; RUN: llc -mtriple armv7-linux-musleabi %s -o - -O0 -regalloc=greedy | FileCheck %s --check-prefix=EABI
; RUN: llc -mtriple armv7-apple-darwin %s -o - | FileCheck %s --check-prefixes=DARWIN
-; RUN: llc -mtriple armv7-apple-darwin %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefix=DARWIN-O0
+; RUN: llc -mtriple armv7-apple-darwin %s -o - -O0 -regalloc=greedy | FileCheck %s --check-prefix=DARWIN-O0
; RUN: llc -mtriple thumbv7-windows %s -o - | FileCheck %s --check-prefixes=WINDOWS,WINDOWS-DEFAULT
-; RUN: llc -mtriple thumbv7-windows %s -o - -O0 -optimize-regalloc | FileCheck %s --check-prefixes=WINDOWS,WINDOWS-O0
+; RUN: llc -mtriple thumbv7-windows %s -o - -O0 -regalloc=greedy | FileCheck %s --check-prefixes=WINDOWS,WINDOWS-O0
define signext i16 @f16(i16 signext %a, i16 signext %b) {
; EABI-LABEL: f16:
diff --git a/llvm/test/CodeGen/ARM/fast-isel-redefinition.ll b/llvm/test/CodeGen/ARM/fast-isel-redefinition.ll
index 2abf3c7a5885f..998a2e259a462 100644
--- a/llvm/test/CodeGen/ARM/fast-isel-redefinition.ll
+++ b/llvm/test/CodeGen/ARM/fast-isel-redefinition.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort=1 -optimize-regalloc -regalloc=basic < %s
+; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort=1 -regalloc=basic < %s
; This isn't exactly a useful set of command-line options, but check that it
; doesn't crash. (It was crashing because a register was getting redefined.)
diff --git a/llvm/test/CodeGen/ARM/ldrd.ll b/llvm/test/CodeGen/ARM/ldrd.ll
index 084abc433a474..8a9d795167013 100644
--- a/llvm/test/CodeGen/ARM/ldrd.ll
+++ b/llvm/test/CodeGen/ARM/ldrd.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs | FileCheck %s -check-prefix=A8 -check-prefix=CHECK -check-prefix=NORMAL
-; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-m3 -regalloc=fast -optimize-regalloc=0 | FileCheck %s -check-prefix=M3 -check-prefix=CHECK -check-prefix=NORMAL
+; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=fast -verify-machineinstrs | FileCheck %s -check-prefix=A8 -check-prefix=CHECK -check-prefix=NORMAL
+; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-m3 -regalloc=fast | FileCheck %s -check-prefix=M3 -check-prefix=CHECK -check-prefix=NORMAL
; rdar://6949835
; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=basic | FileCheck %s -check-prefix=BASIC -check-prefix=CHECK -check-prefix=NORMAL
; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=greedy | FileCheck %s -check-prefix=GREEDY -check-prefix=CHECK -check-prefix=NORMAL
diff --git a/llvm/test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll b/llvm/test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll
index 4f826ae4e08a5..a65ff47fae0a9 100644
--- a/llvm/test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll
+++ b/llvm/test/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -regalloc=fast -optimize-regalloc=0
+; RUN: llc < %s -regalloc=fast
%struct.CHESS_POSITION = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32, i8, i8, [64 x i8], i8, i8, i8, i8, i8 }
@search = external global %struct.CHESS_POSITION ; <ptr> [#uses=2]
diff --git a/llvm/test/CodeGen/Generic/edge-bundles-blockIDs.ll b/llvm/test/CodeGen/Generic/edge-bundles-blockIDs.ll
index d86c75838e537..b4ae415b50130 100644
--- a/llvm/test/CodeGen/Generic/edge-bundles-blockIDs.ll
+++ b/llvm/test/CodeGen/Generic/edge-bundles-blockIDs.ll
@@ -1,6 +1,6 @@
; Make sure EdgeBoundles handles the case when the function size is less then
; the number of block IDs.
-; RUN: llc -regalloc=fast -optimize-regalloc=0 < %s
+; RUN: llc -regalloc=fast < %s
define void @foo() nounwind {
entry:
diff --git a/llvm/test/CodeGen/LoongArch/inline-asm-clobbers-fcc.mir b/llvm/test/CodeGen/LoongArch/inline-asm-clobbers-fcc.mir
index aef7ee908bdfa..5da2ee0a21611 100644
--- a/llvm/test/CodeGen/LoongArch/inline-asm-clobbers-fcc.mir
+++ b/llvm/test/CodeGen/LoongArch/inline-asm-clobbers-fcc.mir
@@ -16,12 +16,14 @@ body: |
; CHECK-LABEL: name: test
; CHECK: liveins: $f0_64, $f1_64
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: renamable $fcc0 = FCMP_CLT_D renamable $f1_64, renamable $f0_64
+ ; CHECK-NEXT: renamable $fcc0 = FCMP_CLT_D killed renamable $f1_64, killed renamable $f0_64
; CHECK-NEXT: PseudoST_CFR $fcc0, %stack.0, 0 :: (store (s64) into %stack.0)
; CHECK-NEXT: INLINEASM &nop, sideeffect attdialect, clobber, implicit-def dead early-clobber $fcc0
; CHECK-NEXT: $fcc0 = PseudoLD_CFR %stack.0, 0 :: (load (s64) from %stack.0)
; CHECK-NEXT: $r4 = COPY killed renamable $fcc0
; CHECK-NEXT: PseudoRET implicit killed $r4
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: .1.entry:
%1:fpr64 = COPY $f1_64
%0:fpr64 = COPY $f0_64
%2:cfr = FCMP_CLT_D %1, %0
diff --git a/llvm/test/CodeGen/M68k/PR57660.ll b/llvm/test/CodeGen/M68k/PR57660.ll
index 359f0c2496356..093b1ae623ca0 100644
--- a/llvm/test/CodeGen/M68k/PR57660.ll
+++ b/llvm/test/CodeGen/M68k/PR57660.ll
@@ -35,31 +35,30 @@ define i32 @foo2(ptr noundef %0) {
; CHECK-LABEL: foo2:
; CHECK: .cfi_startproc
; CHECK-NEXT: ; %bb.0: ; %entry
-; CHECK-NEXT: suba.l #4, %sp
-; CHECK-NEXT: .cfi_def_cfa_offset -8
-; CHECK-NEXT: move.l (8,%sp), %a0
+; CHECK-NEXT: suba.l #8, %sp
+; CHECK-NEXT: .cfi_def_cfa_offset -12
+; CHECK-NEXT: move.l (12,%sp), %a0
; CHECK-NEXT: move.b (%a0), %d0
-; CHECK-NEXT: movem.w %d0, (0,%sp)
+; CHECK-NEXT: movem.w %d0, (4,%sp)
; CHECK-NEXT: and.b #1, %d0
-; CHECK-NEXT: movem.w %d0, (2,%sp)
+; CHECK-NEXT: movem.w %d0, (6,%sp)
; CHECK-NEXT: sub.b #1, %d0
; CHECK-NEXT: bgt .LBB1_2
; CHECK-NEXT: ; %bb.1: ; %if
-; CHECK-NEXT: movem.w (2,%sp), %d0
-; CHECK-NEXT: movem.w (0,%sp), %d1
+; CHECK-NEXT: movem.w (4,%sp), %d1
+; CHECK-NEXT: movem.w (6,%sp), %d0
; CHECK-NEXT: add.b %d1, %d0
; CHECK-NEXT: bra .LBB1_3
; CHECK-NEXT: .LBB1_2: ; %else
-; CHECK-NEXT: movem.w (2,%sp), %d1
-; CHECK-NEXT: movem.w (0,%sp), %d0
+; CHECK-NEXT: movem.w (6,%sp), %d1
+; CHECK-NEXT: movem.w (4,%sp), %d0
; CHECK-NEXT: sub.b %d1, %d0
-; CHECK-NEXT: movem.w %d0, (0,%sp)
; CHECK-NEXT: .LBB1_3: ; %cont
; CHECK-NEXT: movem.w %d0, (2,%sp)
; CHECK-NEXT: movem.w (2,%sp), %d0
; CHECK-NEXT: ext.w %d0
; CHECK-NEXT: ext.l %d0
-; CHECK-NEXT: adda.l #4, %sp
+; CHECK-NEXT: adda.l #8, %sp
; CHECK-NEXT: rts
entry:
%1 = getelementptr i8, ptr %0, i32 0
diff --git a/llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll b/llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
index c3213263eb42b..a4c48d5c45e25 100644
--- a/llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
+++ b/llvm/test/CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll
@@ -1,5 +1,5 @@
; RUN: llc -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -verify-machineinstrs < %s -regalloc=fast -optimize-regalloc=0 | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s -regalloc=fast | FileCheck %s
; The first argument of subfc must not be the same as any other register.
; CHECK: APP
diff --git a/llvm/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll b/llvm/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
index 86df40f2ab476..bcde0d27c31d0 100644
--- a/llvm/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
+++ b/llvm/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -regalloc=fast -relocation-model=pic | FileCheck %s
%struct.NSError = type opaque
%struct.NSManagedObjectContext = type opaque
diff --git a/llvm/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll b/llvm/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll
index ab26223c9754c..248f0329ae7ca 100644
--- a/llvm/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll
+++ b/llvm/test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -regalloc=fast -relocation-model=pic | FileCheck %s
%struct.NSError = type opaque
%struct.NSManagedObjectContext = type opaque
diff --git a/llvm/test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll b/llvm/test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll
index cc560a21c14aa..29e2afbe37df8 100644
--- a/llvm/test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll
+++ b/llvm/test/CodeGen/PowerPC/2008-02-09-LocalRegAllocAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu -regalloc=fast -optimize-regalloc=0 | FileCheck %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu -regalloc=fast | FileCheck %s
; CHECK: @bork
; CHECK: blr
diff --git a/llvm/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll b/llvm/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll
index 0846f7250ed93..55aa3161c931d 100644
--- a/llvm/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll
+++ b/llvm/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs %s -mtriple=powerpc64-unknown-linux-gnu -O2 -o - -optimize-regalloc=false -regalloc=fast | FileCheck %s
+; RUN: llc -verify-machineinstrs %s -mtriple=powerpc64-unknown-linux-gnu -O2 -o - -regalloc=fast | FileCheck %s
declare void @func(ptr, i64, i64)
diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-redefinition.ll b/llvm/test/CodeGen/PowerPC/fast-isel-redefinition.ll
index a04ee383f4210..237d89793d244 100644
--- a/llvm/test/CodeGen/PowerPC/fast-isel-redefinition.ll
+++ b/llvm/test/CodeGen/PowerPC/fast-isel-redefinition.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort=1 -optimize-regalloc -regalloc=basic -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
+; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort=1 -regalloc=basic -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
; This isn't exactly a useful set of command-line options, but check that it
; doesn't crash. (It crashed formerly on ARM, and proved useful in
; discovering a bug on PowerPC as well.)
diff --git a/llvm/test/CodeGen/SystemZ/copy-physreg-vr16.ll b/llvm/test/CodeGen/SystemZ/copy-physreg-vr16.ll
index 89fb8e4e8f820..7cb7a248875d4 100644
--- a/llvm/test/CodeGen/SystemZ/copy-physreg-vr16.ll
+++ b/llvm/test/CodeGen/SystemZ/copy-physreg-vr16.ll
@@ -25,6 +25,7 @@ define <4 x half> @fun1(half %0) {
; CHECK-NEXT: brasl %r14, __extendhfsf2 at PLT
; CHECK-NEXT: aebr %f0, %f0
; CHECK-NEXT: brasl %r14, __truncsfhf2 at PLT
+; CHECK-NEXT: # implicit-def: $v24
; CHECK-NEXT: vlr %v24, %v0
; CHECK-NEXT: lmg %r14, %r15, 272(%r15)
; CHECK-NEXT: br %r14
diff --git a/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll b/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
index de07b353e41d9..7fd8adbd27972 100644
--- a/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
+++ b/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -regalloc=fast -optimize-regalloc=0
+; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -regalloc=fast
define void @SolveCubic(double %a, double %b, double %c, double %d, ptr %solutions, ptr %x) {
entry:
diff --git a/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll b/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll
index 788d2da789bfe..6c6fb34a58750 100644
--- a/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll
+++ b/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -mtriple=i686-- -mattr=+mmx | FileCheck %s
+; RUN: llc < %s -regalloc=fast -mtriple=i686-- -mattr=+mmx | FileCheck %s
; PR2082
; Local register allocator was refusing to use ESI, EDI, and EBP so it ran out of
; registers.
diff --git a/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll
index 58d626f5866e7..8595b44168334 100644
--- a/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -O0 -fast-isel=false -optimize-regalloc -regalloc=basic | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -O0 -fast-isel=false -regalloc=basic | FileCheck %s
; PR2343
%llvm.dbg.anchor.type = type { i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll b/llvm/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll
index dcce33b0bf307..c8ffbb54fec89 100644
--- a/llvm/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll
+++ b/llvm/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -regalloc=fast -optimize-regalloc=0
+; RUN: llc < %s -mtriple=i386-apple-darwin -regalloc=fast
@_ZTVN10Evaluation10GridOutputILi3EEE = external constant [5 x ptr] ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2008-09-17-inline-asm-1.ll b/llvm/test/CodeGen/X86/2008-09-17-inline-asm-1.ll
index abd9becc70f30..6afef42104fc4 100644
--- a/llvm/test/CodeGen/X86/2008-09-17-inline-asm-1.ll
+++ b/llvm/test/CodeGen/X86/2008-09-17-inline-asm-1.ll
@@ -1,5 +1,5 @@
; RUN: llc < %s | FileCheck %s
-; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 | FileCheck %s
+; RUN: llc < %s -regalloc=fast | FileCheck %s
; %0 must not be put in EAX or EDX.
; In the first asm, $0 and $2 must not be put in EAX.
diff --git a/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll b/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
index 7e392e5481087..de973eb1f1233 100644
--- a/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
+++ b/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -regalloc=fast -no-integrated-as | FileCheck %s
; RUN: llc < %s -regalloc=basic -no-integrated-as | FileCheck %s
; RUN: llc < %s -regalloc=greedy -no-integrated-as | FileCheck %s
diff --git a/llvm/test/CodeGen/X86/2009-04-24.ll b/llvm/test/CodeGen/X86/2009-04-24.ll
index a7769878cd82d..511d50676e0e5 100644
--- a/llvm/test/CodeGen/X86/2009-04-24.ll
+++ b/llvm/test/CodeGen/X86/2009-04-24.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-linux-gnu -regalloc=fast -relocation-model=pic | FileCheck %s
; PR4004
; CHECK: {{leaq.*TLSGD}}
diff --git a/llvm/test/CodeGen/X86/2010-05-06-LocalInlineAsmClobber.ll b/llvm/test/CodeGen/X86/2010-05-06-LocalInlineAsmClobber.ll
index c9aa3b8ca9fcb..89b7d6b101790 100644
--- a/llvm/test/CodeGen/X86/2010-05-06-LocalInlineAsmClobber.ll
+++ b/llvm/test/CodeGen/X86/2010-05-06-LocalInlineAsmClobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -regalloc=fast -optimize-regalloc=0 %s -o %t
+; RUN: llc -regalloc=fast %s -o %t
; PR7066
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
diff --git a/llvm/test/CodeGen/X86/2010-05-12-FastAllocKills.ll b/llvm/test/CodeGen/X86/2010-05-12-FastAllocKills.ll
index 1a1f6617d930f..581d5ab13d816 100644
--- a/llvm/test/CodeGen/X86/2010-05-12-FastAllocKills.ll
+++ b/llvm/test/CodeGen/X86/2010-05-12-FastAllocKills.ll
@@ -1,4 +1,4 @@
-; RUN: llc -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs < %s
+; RUN: llc -regalloc=fast -verify-machineinstrs < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin"
diff --git a/llvm/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll b/llvm/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
index 0e8c786f4b764..fe607d7e37cc1 100644
--- a/llvm/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
+++ b/llvm/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -regalloc=fast -optimize-regalloc=0 -no-integrated-as < %s | FileCheck %s
+; RUN: llc -regalloc=fast -no-integrated-as < %s | FileCheck %s
; PR7382
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/inline-asm-error.ll b/llvm/test/CodeGen/X86/inline-asm-error.ll
index a757365e34823..76227db301a28 100644
--- a/llvm/test/CodeGen/X86/inline-asm-error.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-error.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=i686-- -regalloc=fast -optimize-regalloc=0 < %s 2> %t1
+; RUN: not llc -mtriple=i686-- -regalloc=fast < %s 2> %t1
; RUN: not llc -mtriple=i686-- -regalloc=basic < %s 2> %t2
; RUN: not llc -mtriple=i686-- -regalloc=greedy < %s 2> %t3
; RUN: FileCheck %s < %t1
diff --git a/llvm/test/CodeGen/X86/inline-asm-tied.ll b/llvm/test/CodeGen/X86/inline-asm-tied.ll
index 7363e613a56e7..02ab2a41159d1 100644
--- a/llvm/test/CodeGen/X86/inline-asm-tied.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-tied.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -regalloc=basic -no-integrated-as | FileCheck %s
; rdar://6992609
target triple = "i386-apple-darwin9.0"
diff --git a/llvm/test/CodeGen/X86/liveness-local-regalloc.ll b/llvm/test/CodeGen/X86/liveness-local-regalloc.ll
index c4293ec42a578..cd9926f13f9bb 100644
--- a/llvm/test/CodeGen/X86/liveness-local-regalloc.ll
+++ b/llvm/test/CodeGen/X86/liveness-local-regalloc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs -mtriple=x86_64-apple-darwin10
+; RUN: llc < %s -regalloc=fast -verify-machineinstrs -mtriple=x86_64-apple-darwin10
; <rdar://problem/7755473>
; PR12821
diff --git a/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll b/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll
index a2cd5b4fcda96..c02ddc15e4d59 100644
--- a/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll
+++ b/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck %s
+; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -no-x86-call-frame-opt | FileCheck %s
; RUN: llc -O0 < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -no-x86-call-frame-opt | FileCheck %s
-; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck %s
+; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -no-x86-call-frame-opt | FileCheck %s
@.str = private constant [12 x i8] c"x + y = %i\0A\00", align 1 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/pr11415.ll b/llvm/test/CodeGen/X86/pr11415.ll
index ee632189ef9ce..c8c902c4e05bd 100644
--- a/llvm/test/CodeGen/X86/pr11415.ll
+++ b/llvm/test/CodeGen/X86/pr11415.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux %s -o - -regalloc=fast -optimize-regalloc=0 | FileCheck %s
+; RUN: llc -mtriple=x86_64-pc-linux %s -o - -regalloc=fast | FileCheck %s
; We used to consider the early clobber in the second asm statement as
; defining %0 before it was read. This caused us to omit the
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