[llvm] [DAG] Add computeKnownBits(FREEZE(X)) handling (PR #214095)
Kevin Le via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 12 20:22:29 PDT 2026
https://github.com/kneevin updated https://github.com/llvm/llvm-project/pull/214095
>From 59b48922daa14fc8e4e951c8450ed2fc7a8f66f1 Mon Sep 17 00:00:00 2001
From: kneevin <kevinkle2002 at gmail.com>
Date: Tue, 4 Aug 2026 16:12:33 -0500
Subject: [PATCH 1/7] [X86] Added test coverage for `ISD::FREEZE` case in
`computeKnownBits()`
---
llvm/test/CodeGen/X86/freeze-vector.ll | 83 ++++++++++++++++++++++++++
1 file changed, 83 insertions(+)
diff --git a/llvm/test/CodeGen/X86/freeze-vector.ll b/llvm/test/CodeGen/X86/freeze-vector.ll
index 5acfa98d0551e..4d12ccfe736f8 100644
--- a/llvm/test/CodeGen/X86/freeze-vector.ll
+++ b/llvm/test/CodeGen/X86/freeze-vector.ll
@@ -886,3 +886,86 @@ define i32 @freeze_vselect_demanded(<4 x i32> %csrc, <2 x i32> %a, <2 x i32> %b,
%ext = extractelement <4 x i32> %fr, i64 0
ret i32 %ext
}
+
+; checks ComputeKnownBits works on FREEZE that can't be removed
+; vselect has multiple poison operands so visitFREEZE can't drop
+; escape store so demanded-elts can't drop
+; known bits from lshr must reach final add folded into or
+define <2 x i64> @freeze_vselect_knownbits(<8 x i32> %csrc, <4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d, ptr %escape) {
+; X86-LABEL: freeze_vselect_knownbits:
+; X86: # %bb.0:
+; X86-NEXT: pushl %ebp
+; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: .cfi_offset %ebp, -8
+; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: .cfi_def_cfa_register %ebp
+; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
+; X86-NEXT: movl 40(%ebp), %eax
+; X86-NEXT: vmovdqa 24(%ebp), %xmm3
+; X86-NEXT: vmovdqa 8(%ebp), %xmm4
+; X86-NEXT: vbroadcastss {{.*#+}} xmm5 = [2147483647,2147483647,2147483647,2147483647]
+; X86-NEXT: vpaddd %xmm5, %xmm0, %xmm6
+; X86-NEXT: vextractf128 $1, %ymm0, %xmm0
+; X86-NEXT: vpxor %xmm7, %xmm7, %xmm7
+; X86-NEXT: vpcmpgtd %xmm7, %xmm6, %xmm6
+; X86-NEXT: vpackssdw %xmm6, %xmm6, %xmm6
+; X86-NEXT: vpcmpgtd %xmm7, %xmm0, %xmm0
+; X86-NEXT: vpaddd %xmm5, %xmm1, %xmm1
+; X86-NEXT: vpsubd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2, %xmm2
+; X86-NEXT: vpsrld $28, %xmm4, %xmm4
+; X86-NEXT: vpsrld $28, %xmm3, %xmm3
+; X86-NEXT: vblendvps %xmm0, %xmm4, %xmm3, %xmm0
+; X86-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm6[0,0,1,1,2,2,3,3]
+; X86-NEXT: vblendvps %xmm3, %xmm1, %xmm2, %xmm1
+; X86-NEXT: vmovaps %xmm0, 16(%eax)
+; X86-NEXT: vmovaps %xmm1, (%eax)
+; X86-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0 # [16,0,16,0]
+; X86-NEXT: movl %ebp, %esp
+; X86-NEXT: popl %ebp
+; X86-NEXT: .cfi_def_cfa %esp, 4
+; X86-NEXT: vzeroupper
+; X86-NEXT: retl
+;
+; X64-LABEL: freeze_vselect_knownbits:
+; X64: # %bb.0:
+; X64-NEXT: vpbroadcastd {{.*#+}} xmm5 = [2147483647,2147483647,2147483647,2147483647]
+; X64-NEXT: vpaddd %xmm5, %xmm0, %xmm6
+; X64-NEXT: vpxor %xmm7, %xmm7, %xmm7
+; X64-NEXT: vpcmpgtd %xmm7, %xmm6, %xmm6
+; X64-NEXT: vextracti128 $1, %ymm0, %xmm0
+; X64-NEXT: vpcmpgtd %xmm7, %xmm0, %xmm0
+; X64-NEXT: vpackssdw %xmm0, %xmm6, %xmm0
+; X64-NEXT: vpmovsxwd %xmm0, %ymm0
+; X64-NEXT: vpaddd %xmm5, %xmm1, %xmm1
+; X64-NEXT: vpbroadcastd {{.*#+}} xmm5 = [2147483648,2147483648,2147483648,2147483648]
+; X64-NEXT: vpsubd %xmm5, %xmm2, %xmm2
+; X64-NEXT: vpsrld $28, %xmm3, %xmm3
+; X64-NEXT: vpsrld $28, %xmm4, %xmm4
+; X64-NEXT: vinserti128 $1, %xmm3, %ymm1, %ymm1
+; X64-NEXT: vinserti128 $1, %xmm4, %ymm2, %ymm2
+; X64-NEXT: vblendvps %ymm0, %ymm1, %ymm2, %ymm0
+; X64-NEXT: vmovaps %ymm0, (%rdi)
+; X64-NEXT: vextractf128 $1, %ymm0, %xmm0
+; X64-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [16,16]
+; X64-NEXT: vzeroupper
+; X64-NEXT: retq
+ %poisonable.src = add nsw <8 x i32> %csrc, splat (i32 2147483647)
+ %poisonable.cmp = icmp sgt <8 x i32> %poisonable.src, zeroinitializer
+ %clean.cmp = icmp sgt <8 x i32> %csrc, zeroinitializer
+ %cond = shufflevector <8 x i1> %poisonable.cmp, <8 x i1> %clean.cmp, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
+ %poisonable.a = add nsw <4 x i32> %a, splat (i32 2147483647)
+ %poisonable.b = sub nsw <4 x i32> %b, splat (i32 -2147483648)
+ %known.c = lshr <4 x i32> %c, splat (i32 28)
+ %known.d = lshr <4 x i32> %d, splat (i32 28)
+ %lhs = shufflevector <4 x i32> %poisonable.a, <4 x i32> %known.c, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ %rhs = shufflevector <4 x i32> %poisonable.b, <4 x i32> %known.d, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ %sel = select <8 x i1> %cond, <8 x i32> %lhs, <8 x i32> %rhs
+ %fr = freeze <8 x i32> %sel
+ store <8 x i32> %fr, ptr %escape
+ %bc = bitcast <8 x i32> %fr to <4 x i64>
+ %ext = shufflevector <4 x i64> %bc, <4 x i64> poison, <2 x i32> <i32 2, i32 3>
+ %add = add <2 x i64> %ext, splat (i64 16)
+ ret <2 x i64> %add
+}
+
>From 88082ad8a9bd9156ed1f32e43c4950496c1a1e6b Mon Sep 17 00:00:00 2001
From: kneevin <kevinkle2002 at gmail.com>
Date: Tue, 4 Aug 2026 16:33:10 -0500
Subject: [PATCH 2/7] [DAG] Added computeKnownBits(FREEZE(X)) handling
---
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 ++++++
llvm/test/CodeGen/X86/freeze-binary.ll | 8 ++++++--
llvm/test/CodeGen/X86/freeze-vector.ll | 2 +-
3 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 683cf2517b2f5..40a8b647c4dee 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3388,6 +3388,12 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
unsigned Opcode = Op.getOpcode();
switch (Opcode) {
+ case ISD::FREEZE: {
+ if(isGuaranteedNotToBeUndefOrPoison(Op.getOperand(0), DemandedElts,
+ UndefPoisonKind::UndefOrPoison))
+ Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
+ break;
+ }
case ISD::MERGE_VALUES:
return computeKnownBits(Op.getOperand(Op.getResNo()), DemandedElts,
Depth + 1);
diff --git a/llvm/test/CodeGen/X86/freeze-binary.ll b/llvm/test/CodeGen/X86/freeze-binary.ll
index b360763f80eca..be4bdfdfeba9a 100644
--- a/llvm/test/CodeGen/X86/freeze-binary.ll
+++ b/llvm/test/CodeGen/X86/freeze-binary.ll
@@ -867,8 +867,10 @@ define i32 @freeze_ssubo(i32 %a0, i32 %a1, i8 %a2, i8 %a3) nounwind {
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: xorl %edx, %edx
; X86-NEXT: addb {{[0-9]+}}(%esp), %cl
-; X86-NEXT: sbbl $0, %eax
+; X86-NEXT: setb %dl
+; X86-NEXT: subl %edx, %eax
; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
;
@@ -896,8 +898,10 @@ define i32 @freeze_usubo(i32 %a0, i32 %a1, i8 %a2, i8 %a3) nounwind {
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: xorl %edx, %edx
; X86-NEXT: addb {{[0-9]+}}(%esp), %cl
-; X86-NEXT: sbbl $0, %eax
+; X86-NEXT: setb %dl
+; X86-NEXT: subl %edx, %eax
; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
;
diff --git a/llvm/test/CodeGen/X86/freeze-vector.ll b/llvm/test/CodeGen/X86/freeze-vector.ll
index 4d12ccfe736f8..a3a9d0ae5b20e 100644
--- a/llvm/test/CodeGen/X86/freeze-vector.ll
+++ b/llvm/test/CodeGen/X86/freeze-vector.ll
@@ -947,7 +947,7 @@ define <2 x i64> @freeze_vselect_knownbits(<8 x i32> %csrc, <4 x i32> %a, <4 x i
; X64-NEXT: vblendvps %ymm0, %ymm1, %ymm2, %ymm0
; X64-NEXT: vmovaps %ymm0, (%rdi)
; X64-NEXT: vextractf128 $1, %ymm0, %xmm0
-; X64-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [16,16]
+; X64-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vzeroupper
; X64-NEXT: retq
%poisonable.src = add nsw <8 x i32> %csrc, splat (i32 2147483647)
>From 293c6cb668eda84cd5f9a2801f33b9fd8fab0984 Mon Sep 17 00:00:00 2001
From: Kevin Le <kevinkle2002 at gmail.com>
Date: Wed, 5 Aug 2026 11:26:34 -0500
Subject: [PATCH 3/7] Apply suggestion from @RKSimon
Co-authored-by: Simon Pilgrim <git at redking.me.uk>
---
llvm/test/CodeGen/X86/freeze-vector.ll | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/test/CodeGen/X86/freeze-vector.ll b/llvm/test/CodeGen/X86/freeze-vector.ll
index a3a9d0ae5b20e..997a0db180b8a 100644
--- a/llvm/test/CodeGen/X86/freeze-vector.ll
+++ b/llvm/test/CodeGen/X86/freeze-vector.ll
@@ -891,7 +891,7 @@ define i32 @freeze_vselect_demanded(<4 x i32> %csrc, <2 x i32> %a, <2 x i32> %b,
; vselect has multiple poison operands so visitFREEZE can't drop
; escape store so demanded-elts can't drop
; known bits from lshr must reach final add folded into or
-define <2 x i64> @freeze_vselect_knownbits(<8 x i32> %csrc, <4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d, ptr %escape) {
+define <2 x i64> @freeze_vselect_knownbits(<8 x i32> %csrc, <4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d, ptr %escape) nounwind {
; X86-LABEL: freeze_vselect_knownbits:
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
>From 1e0d3bb7eb926a61d1010945f6ac92597eb83b71 Mon Sep 17 00:00:00 2001
From: kneevin <kevinkle2002 at gmail.com>
Date: Thu, 6 Aug 2026 13:06:38 -0500
Subject: [PATCH 4/7] [X86] Added nounwind and regenerated tests
---
llvm/test/CodeGen/X86/freeze-vector.ll | 4 ----
1 file changed, 4 deletions(-)
diff --git a/llvm/test/CodeGen/X86/freeze-vector.ll b/llvm/test/CodeGen/X86/freeze-vector.ll
index 997a0db180b8a..29a8c6ace0f5b 100644
--- a/llvm/test/CodeGen/X86/freeze-vector.ll
+++ b/llvm/test/CodeGen/X86/freeze-vector.ll
@@ -895,10 +895,7 @@ define <2 x i64> @freeze_vselect_knownbits(<8 x i32> %csrc, <4 x i32> %a, <4 x i
; X86-LABEL: freeze_vselect_knownbits:
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
-; X86-NEXT: .cfi_def_cfa_offset 8
-; X86-NEXT: .cfi_offset %ebp, -8
; X86-NEXT: movl %esp, %ebp
-; X86-NEXT: .cfi_def_cfa_register %ebp
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $16, %esp
; X86-NEXT: movl 40(%ebp), %eax
@@ -923,7 +920,6 @@ define <2 x i64> @freeze_vselect_knownbits(<8 x i32> %csrc, <4 x i32> %a, <4 x i
; X86-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0 # [16,0,16,0]
; X86-NEXT: movl %ebp, %esp
; X86-NEXT: popl %ebp
-; X86-NEXT: .cfi_def_cfa %esp, 4
; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
>From ac2906acc831066fa51d4c8001be37e321ff6b9b Mon Sep 17 00:00:00 2001
From: kneevin <kevinkle2002 at gmail.com>
Date: Thu, 6 Aug 2026 13:07:33 -0500
Subject: [PATCH 5/7] [DAG] Formatting
---
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 40a8b647c4dee..8a7e2700fdafa 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3389,9 +3389,9 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
unsigned Opcode = Op.getOpcode();
switch (Opcode) {
case ISD::FREEZE: {
- if(isGuaranteedNotToBeUndefOrPoison(Op.getOperand(0), DemandedElts,
- UndefPoisonKind::UndefOrPoison))
- Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
+ if (isGuaranteedNotToBeUndefOrPoison(Op.getOperand(0), DemandedElts,
+ UndefPoisonKind::UndefOrPoison))
+ Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
break;
}
case ISD::MERGE_VALUES:
>From 48d512d6cd1e533e48fd12aca2161a2a57285a43 Mon Sep 17 00:00:00 2001
From: kneevin <kevinkle2002 at gmail.com>
Date: Wed, 12 Aug 2026 22:18:58 -0500
Subject: [PATCH 6/7] [X86] Reduce freeze knownbits test via llvm-reduce
---
llvm/test/CodeGen/X86/freeze-vector.ll | 97 ++++++++++----------------
1 file changed, 38 insertions(+), 59 deletions(-)
diff --git a/llvm/test/CodeGen/X86/freeze-vector.ll b/llvm/test/CodeGen/X86/freeze-vector.ll
index 29a8c6ace0f5b..6d25112328786 100644
--- a/llvm/test/CodeGen/X86/freeze-vector.ll
+++ b/llvm/test/CodeGen/X86/freeze-vector.ll
@@ -887,81 +887,60 @@ define i32 @freeze_vselect_demanded(<4 x i32> %csrc, <2 x i32> %a, <2 x i32> %b,
ret i32 %ext
}
-; checks ComputeKnownBits works on FREEZE that can't be removed
-; vselect has multiple poison operands so visitFREEZE can't drop
-; escape store so demanded-elts can't drop
-; known bits from lshr must reach final add folded into or
-define <2 x i64> @freeze_vselect_knownbits(<8 x i32> %csrc, <4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d, ptr %escape) nounwind {
+
+; check computeKnownBits sees through FREEZE it can't removed
+; - %cond and %rhs are poison so visitFREEZE can't fold freeze away
+; - the store %escape prevents demanded-elts from shrinking it
+; - knownbits(select) == intersection(lhs, lshr rhs) = 28 bits are known zeroes,
+; so add should fold to an or
+define <2 x i64> @freeze_vselect_knownbits(<8 x i32> %csrc, <4 x i32> %a, <4 x i32> %c, ptr %escape) nounwind {
; X86-LABEL: freeze_vselect_knownbits:
; X86: # %bb.0:
-; X86-NEXT: pushl %ebp
-; X86-NEXT: movl %esp, %ebp
-; X86-NEXT: andl $-16, %esp
-; X86-NEXT: subl $16, %esp
-; X86-NEXT: movl 40(%ebp), %eax
-; X86-NEXT: vmovdqa 24(%ebp), %xmm3
-; X86-NEXT: vmovdqa 8(%ebp), %xmm4
-; X86-NEXT: vbroadcastss {{.*#+}} xmm5 = [2147483647,2147483647,2147483647,2147483647]
-; X86-NEXT: vpaddd %xmm5, %xmm0, %xmm6
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
+; X86-NEXT: vpsubd %xmm3, %xmm0, %xmm0
+; X86-NEXT: vpxor %xmm4, %xmm4, %xmm4
+; X86-NEXT: vpcmpgtd %xmm4, %xmm0, %xmm0
+; X86-NEXT: vpackssdw %xmm0, %xmm0, %xmm0
+; X86-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
+; X86-NEXT: vpaddd %xmm3, %xmm1, %xmm1
+; X86-NEXT: vpsrld $28, %xmm2, %xmm2
+; X86-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
+; X86-NEXT: vblendvps %ymm0, {{\.?LCPI[0-9]+_[0-9]+}}, %ymm1, %ymm0
+; X86-NEXT: vmovaps %ymm0, (%eax)
; X86-NEXT: vextractf128 $1, %ymm0, %xmm0
-; X86-NEXT: vpxor %xmm7, %xmm7, %xmm7
-; X86-NEXT: vpcmpgtd %xmm7, %xmm6, %xmm6
-; X86-NEXT: vpackssdw %xmm6, %xmm6, %xmm6
-; X86-NEXT: vpcmpgtd %xmm7, %xmm0, %xmm0
-; X86-NEXT: vpaddd %xmm5, %xmm1, %xmm1
-; X86-NEXT: vpsubd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm2, %xmm2
-; X86-NEXT: vpsrld $28, %xmm4, %xmm4
-; X86-NEXT: vpsrld $28, %xmm3, %xmm3
-; X86-NEXT: vblendvps %xmm0, %xmm4, %xmm3, %xmm0
-; X86-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm6[0,0,1,1,2,2,3,3]
-; X86-NEXT: vblendvps %xmm3, %xmm1, %xmm2, %xmm1
-; X86-NEXT: vmovaps %xmm0, 16(%eax)
-; X86-NEXT: vmovaps %xmm1, (%eax)
; X86-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0 # [16,0,16,0]
-; X86-NEXT: movl %ebp, %esp
-; X86-NEXT: popl %ebp
; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
; X64-LABEL: freeze_vselect_knownbits:
; X64: # %bb.0:
-; X64-NEXT: vpbroadcastd {{.*#+}} xmm5 = [2147483647,2147483647,2147483647,2147483647]
-; X64-NEXT: vpaddd %xmm5, %xmm0, %xmm6
-; X64-NEXT: vpxor %xmm7, %xmm7, %xmm7
-; X64-NEXT: vpcmpgtd %xmm7, %xmm6, %xmm6
-; X64-NEXT: vextracti128 $1, %ymm0, %xmm0
-; X64-NEXT: vpcmpgtd %xmm7, %xmm0, %xmm0
-; X64-NEXT: vpackssdw %xmm0, %xmm6, %xmm0
+; X64-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
+; X64-NEXT: vpsubd %xmm3, %xmm0, %xmm0
+; X64-NEXT: vpxor %xmm4, %xmm4, %xmm4
+; X64-NEXT: vpcmpgtd %xmm4, %xmm0, %xmm0
+; X64-NEXT: vpackssdw %xmm4, %xmm0, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %ymm0
-; X64-NEXT: vpaddd %xmm5, %xmm1, %xmm1
-; X64-NEXT: vpbroadcastd {{.*#+}} xmm5 = [2147483648,2147483648,2147483648,2147483648]
-; X64-NEXT: vpsubd %xmm5, %xmm2, %xmm2
-; X64-NEXT: vpsrld $28, %xmm3, %xmm3
-; X64-NEXT: vpsrld $28, %xmm4, %xmm4
-; X64-NEXT: vinserti128 $1, %xmm3, %ymm1, %ymm1
-; X64-NEXT: vinserti128 $1, %xmm4, %ymm2, %ymm2
-; X64-NEXT: vblendvps %ymm0, %ymm1, %ymm2, %ymm0
+; X64-NEXT: vpaddd %xmm3, %xmm1, %xmm1
+; X64-NEXT: vpsrld $28, %xmm2, %xmm2
+; X64-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
+; X64-NEXT: vblendvps %ymm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm0
; X64-NEXT: vmovaps %ymm0, (%rdi)
; X64-NEXT: vextractf128 $1, %ymm0, %xmm0
-; X64-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
+; X64-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [16,16]
; X64-NEXT: vzeroupper
; X64-NEXT: retq
- %poisonable.src = add nsw <8 x i32> %csrc, splat (i32 2147483647)
- %poisonable.cmp = icmp sgt <8 x i32> %poisonable.src, zeroinitializer
- %clean.cmp = icmp sgt <8 x i32> %csrc, zeroinitializer
- %cond = shufflevector <8 x i1> %poisonable.cmp, <8 x i1> %clean.cmp, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
- %poisonable.a = add nsw <4 x i32> %a, splat (i32 2147483647)
- %poisonable.b = sub nsw <4 x i32> %b, splat (i32 -2147483648)
+ %poisonable.src = add nsw <8 x i32> %csrc, splat (i32 1)
+ %poisonable.cmp = icmp sgt <8 x i32> %poisonable.src, zeroinitializer
+ %cond = shufflevector <8 x i1> %poisonable.cmp, <8 x i1> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
+ %poisonable.b = sub nsw <4 x i32> %a, splat (i32 1)
%known.c = lshr <4 x i32> %c, splat (i32 28)
- %known.d = lshr <4 x i32> %d, splat (i32 28)
- %lhs = shufflevector <4 x i32> %poisonable.a, <4 x i32> %known.c, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
- %rhs = shufflevector <4 x i32> %poisonable.b, <4 x i32> %known.d, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
- %sel = select <8 x i1> %cond, <8 x i32> %lhs, <8 x i32> %rhs
- %fr = freeze <8 x i32> %sel
- store <8 x i32> %fr, ptr %escape
- %bc = bitcast <8 x i32> %fr to <4 x i64>
+ %rhs = shufflevector <4 x i32> %poisonable.b, <4 x i32> %known.c, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ %sel = select <8 x i1> %cond, <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0>, <8 x i32> %rhs
+ %fr = freeze <8 x i32> %sel
+ store <8 x i32> %fr, ptr %escape, align 32
+ %bc = bitcast <8 x i32> %fr to <4 x i64>
%ext = shufflevector <4 x i64> %bc, <4 x i64> poison, <2 x i32> <i32 2, i32 3>
%add = add <2 x i64> %ext, splat (i64 16)
ret <2 x i64> %add
}
-
>From 2d4b9f3702487f2d663889b419142fa8517a62e8 Mon Sep 17 00:00:00 2001
From: kneevin <kevinkle2002 at gmail.com>
Date: Wed, 12 Aug 2026 22:19:38 -0500
Subject: [PATCH 7/7] [X86] Regenerate reduced test checks
---
llvm/test/CodeGen/X86/freeze-vector.ll | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/llvm/test/CodeGen/X86/freeze-vector.ll b/llvm/test/CodeGen/X86/freeze-vector.ll
index 6d25112328786..7062ace700512 100644
--- a/llvm/test/CodeGen/X86/freeze-vector.ll
+++ b/llvm/test/CodeGen/X86/freeze-vector.ll
@@ -909,7 +909,7 @@ define <2 x i64> @freeze_vselect_knownbits(<8 x i32> %csrc, <4 x i32> %a, <4 x i
; X86-NEXT: vblendvps %ymm0, {{\.?LCPI[0-9]+_[0-9]+}}, %ymm1, %ymm0
; X86-NEXT: vmovaps %ymm0, (%eax)
; X86-NEXT: vextractf128 $1, %ymm0, %xmm0
-; X86-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0 # [16,0,16,0]
+; X86-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0, %xmm0
; X86-NEXT: vzeroupper
; X86-NEXT: retl
;
@@ -927,7 +927,7 @@ define <2 x i64> @freeze_vselect_knownbits(<8 x i32> %csrc, <4 x i32> %a, <4 x i
; X64-NEXT: vblendvps %ymm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm0
; X64-NEXT: vmovaps %ymm0, (%rdi)
; X64-NEXT: vextractf128 $1, %ymm0, %xmm0
-; X64-NEXT: vpaddq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [16,16]
+; X64-NEXT: vorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
; X64-NEXT: vzeroupper
; X64-NEXT: retq
%poisonable.src = add nsw <8 x i32> %csrc, splat (i32 1)
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