[llvm] [mlir] [NVPTX] Add tcgen05.mma kind::ti16 for sm_107f + mxf4{nvf4} for sm_107a (PR #215624)
Kirill Vedernikov via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 12 07:58:10 PDT 2026
================
@@ -287,6 +287,116 @@ define void @tcgen05_mma_disable_output_lane_collector_b_f8f6f4_cta2(ptr addrspa
ret void
}
+; ---------------------------------------------------------------------------
+; ti16, cta_group::1
+; ---------------------------------------------------------------------------
+
+define void @tcgen05_mma_disable_output_lane_collector_b_ti16_cta1(ptr addrspace(6) %dtmem, ptr addrspace(6) %atensor, i64 %ashared, i64 %b, i32 %idesc, i1 %enable_inp_d, <4 x i32> %disable_output_lanev4) {
+ ; kind=ti16(4), cta_group=1, collector_a=discard(0), collector_b=lastuse(1)
----------------
kvederni wrote:
Thanks! FORMAT checks have been added.
https://github.com/llvm/llvm-project/pull/215624
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