[llvm] [mlir] [NVPTX] Add tcgen05.mma kind::ti16 for sm_107f + mxf4{nvf4} for sm_107a (PR #215624)

[Durgadoss R via llvm-commits]

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@@ -3414,11 +3414,18 @@ foreach sparse = [0, 1] in {
                       llvm_i32_ty,        // collector_buffer_b
                       llvm_i32_ty];       // collector_usage_b_op
       defvar nargs = !size(args);
+      defvar kind_idx = ArgIndex<nargs>;
+      defvar collector_buffer_b_idx = ArgIndex<!add(nargs, 1)>;
+      defvar collector_usage_b_op_idx = ArgIndex<!add(nargs, 2)>;
       defvar intrinsic_properties = !listconcat(
         mma.common_intr_props,
-        [Range<ArgIndex<nargs>, 0, 4>,
-         Range<ArgIndex<!add(nargs, 1)>, 0, 4>,
-         Range<ArgIndex<!add(nargs, 2)>, 0, 4>]
+        [Range<kind_idx, 0, 5>,
+         Range<collector_buffer_b_idx, 0, 4>,
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durga4github wrote:

sure. makes sense.

https://github.com/llvm/llvm-project/pull/215624