[llvm] [AMDGPU] VOP1 bf16 instructions read high 16 bit of an inline (PR #215688)

Stanislav Mekhanoshin via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 11 16:59:30 PDT 2026

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https://github.com/rampitec edited https://github.com/llvm/llvm-project/pull/215688

Previous message: [llvm] [AMDGPU] Allow OPSEL in bf16 trans instructions in fake16 (PR #215687)
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